Home
last modified time | relevance | path

Searched +full:model +full:- +full:dependent (Results 1 – 25 of 47) sorted by relevance

12

/Documentation/devicetree/bindings/media/
Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
[all …]
/Documentation/devicetree/bindings/display/
Drenesas,shmobile-lcdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas SH-Mobile LCD Controller (LCDC)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - renesas,r8a7740-lcdc # R-Mobile A1
17 - renesas,sh73a0-lcdc # SH-Mobile AG5
30 Some of the optional clocks are model-dependent (e.g. "video" (a.k.a.
[all …]
Drenesas,rzg2l-du.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
20 - enum:
21 - renesas,r9a07g043u-du # RZ/G2UL
22 - renesas,r9a07g044-du # RZ/G2{L,LC}
23 - items:
[all …]
Drenesas,du.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
[all …]
/Documentation/ABI/testing/
Dsysfs-class-net-cdc_ncm10 as-is, without any padding, and are terminated with a
14 back-to-back without any interleaving short USB
50 The actual limits are device dependent. See
66 The actual limits are device dependent. See
82 The following read-only attributes all represent fields of the
85 Control Model Devices" (CDC NCM), Revision 1.0 (Errata 1), November
87 quoted from table 6-3 of CDC NCM: "NTB Parameter Structure".
94 - Bit 0: 16-bit NTB supported (set to 1)
95 - Bit 1: 32-bit NTB supported
96 - Bits 2 – 15: reserved (reset to zero; must be ignored by host)
Dsysfs-class-hwmon16 The contents of the label are free-form.
135 this voltage channel is being used for, and user-space
137 user-space.
145 When disabled the sensor read will return -ENODATA.
147 - 1: Enable
148 - 0: Disable
156 - 1: Failed
157 - 0: Ok
247 model.
262 Only makes sense if the chip supports closed-loop fan speed
[all …]
/Documentation/arch/s390/
Dpci.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Pierre Morel
17 -----------------------
28 ---------------
36 - /sys/kernel/debug/s390dbf/pci_msg/sprintf
56 - /sys/bus/pci/slots/XXXXXXXX/power
64 - function_id
67 - function_handle
68 Low-level identifier used for a configured PCI function.
71 - pchid
[all …]
/Documentation/driver-api/
Deisa.rst5 :Author: Marc Zyngier <maz@wild-wind.fr.eu.org>
23 - The bus code implements most of the generic code. It is shared
29 - The bus root driver implements the glue between the bus hardware
37 - The driver offers the bus a list of devices that it manages, and
102 optionally be paired with a driver-dependent value
106 Documentation/driver-api/driver-model/driver.rst. Only .name,
155 dev generic device (see Documentation/driver-api/driver-model/device.rst)
187 A comma-separated list of slots to be enabled, even if the firmware
192 A comma-separated list of slots to be disabled, even if the firmware
220 model is "the right thing"(tm).
[all …]
/Documentation/admin-guide/
Dpnp.rst10 --------
18 ------------------
26 - id - displays a list of support EISA IDs
27 - options - displays possible resource configurations
28 - resources - displays currently allocated resources and allows resource changes
46 <depnum> - the configuration number
47 <mode> - static or dynamic
75 - Notice the string "DISABLED". This means the device is not active.
80 Dependent: 01 - Priority acceptable
81 port 0x3f0-0x3f0, align 0x7, size 0x6, 16-bit address decoding
[all …]
Dcgroup-v2.rst1 .. _cgroup-v2:
11 conventions of cgroup v2. It describes all userland-visible aspects
14 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
19 1-1. Terminology
20 1-2. What is cgroup?
22 2-1. Mounting
23 2-2. Organizing Processes and Threads
24 2-2-1. Processes
25 2-2-2. Threads
26 2-3. [Un]populated Notification
[all …]
/Documentation/arch/arm64/
Dsme.rst14 model. To aid understanding, a minimal description of relevant programmer's
15 model features for SME is included in Appendix A.
19 -----------
26 instructions and registers, and the Linux-specific system interfaces
31 the SME2 instructions and ZT0, and the Linux-specific system interfaces
58 cpu-feature-registers.txt for details.
69 vectors from 0 to VL/8-1 stored in the same endianness invariant format as is
76 ------------------
84 3. Sharing of streaming and non-streaming mode SVE state
85 ---------------------------------------------------------
[all …]
Dsve.rst18 model. To aid understanding, a minimal description of relevant programmer's
19 model features for SVE is included in Appendix A.
23 -----------
26 tracked per-thread.
34 instructions and registers, and the Linux-specific system interfaces
61 cpu-feature-registers.txt for details.
79 an endianness-invariant layout, with bits [(8 * i + 7) : (8 * i)] encoded at
84 Beware that on big-endian systems this results in a different byte order than
85 for the FPSIMD V-registers, which are stored as single host-endian 128-bit
86 values, with bits [(127 - 8 * i) : (120 - 8 * i)] of the register encoded at
[all …]
Dacpi_object_usage.rst16 - Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
18 - Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
20 - Optional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT,
24 - Not supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT,
41 This table describes a non-maskable event, that is used by the platform
68 Optional, not currently supported, with no real use-case for an
83 time as ARM-compatible hardware is available, and the specification
151 UEFI-based; if it is UEFI-based, this table may be supplied. When this
167 the hardware reduced profile, and only 64-bit address fields will
184 filled in properly - that the PSCI_COMPLIANT flag is set and that
[all …]
/Documentation/sound/hd-audio/
Dnotes.rst2 More Notes on HD-Audio Driver
11 HD-audio is the new standard on-board audio component on modern PCs
12 after AC97. Although Linux has been supporting HD-audio since long
15 This document explains the brief trouble-shooting and debugging
16 methods for the HD-audio hardware.
18 The HD-audio component consists of two parts: the controller chip and
19 the codec chips on the HD-audio bus. Linux provides a single driver
20 for all controllers, snd-hda-intel. Although the driver name contains
21 a word of a well-known hardware vendor, it's not specific to it but for
22 all controller chips by other companies. Since the HD-audio
[all …]
/Documentation/locking/
Dpreempt-locking.rst2 Proper Locking Under a Preemptible Kernel: Keeping Kernel Code Preempt-Safe
14 kernel model leverages existing SMP locking mechanisms. Thus, the kernel
21 RULE #1: Per-CPU data structures need explicit protection
32 First, since the data is per-CPU, it may not have explicit SMP locking, but
44 Under preemption, the state of the CPU must be protected. This is arch-
45 dependent, but includes CPU structures and state not preserved over a context
48 if the kernel is executing a floating-point instruction and is then preempted.
84 n-times in a code path, and preemption will not be reenabled until the n-th
93 disabling preemption - any cond_resched() or cond_resched_lock() might trigger
95 reschedule. So use this implicit preemption-disabling property only if you
[all …]
/Documentation/trace/
Dmmiotrace.rst2 In-kernel memory-mapped I/O tracing
11 Injection Test Harness. In Dec 2006 - Jan 2007, using the code from Intel,
15 Mmiotrace was built for reverse engineering any memory-mapped IO device with
19 Out-of-tree mmiotrace was originally modified for mainline inclusion and
24 -----------
29 is on-line, therefore mmiotrace takes all but one CPU off-line during run-time
30 activation. You can re-enable CPUs by hand, but you have been warned, there
35 ---------------------
38 $ mount -t debugfs debugfs /sys/kernel/debug
48 -----
[all …]
/Documentation/gpu/amdgpu/
Ddriver-core.rst18 and register access functions are SoC dependent.
32 This was a dedicated IP on older pre-vega chips, but has since
36 the programming model is still pretty similar. This is how the
58 It is described in more details in :ref:`Display Core <amdgpu-display-core>`.
61 This is a multi-purpose DMA engine. The kernel driver uses it for
69 largest block on the GPU. The 3D pipeline has tons of sub-blocks. In
75 This is the multi-media engine. It handles video and image encode and
76 decode. It's exposed to userspace for user mode drivers (VA-API,
80 -------------------------------------
127 .. kernel-doc:: include/uapi/drm/amdgpu_drm.h
[all …]
/Documentation/dev-tools/
Dkcsan.rst1 .. SPDX-License-Identifier: GPL-2.0
8 relies on compile-time instrumentation, and uses a watchpoint-based sampling
12 -----
30 BUG: KCSAN: data-race in test_kernel_read / test_kernel_write
44 value changed: 0x00000000000009a6 -> 0x00000000000009b2
47 CPU: 6 PID: 488 Comm: access_thread Not tainted 5.12.0-rc2+ #1
48 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.14.0-2 04/01/2014
59 BUG: KCSAN: data-race in test_kernel_rmw_array+0x71/0xd0
67 value changed: 0x0000000000002328 -> 0x0000000000002329
70 CPU: 2 PID: 515 Comm: access_thread Not tainted 5.12.0-rc2+ #1
[all …]
/Documentation/networking/
Dswitchdev.rst1 .. SPDX-License-Identifier: GPL-2.0
6 Ethernet switch device driver model (switchdev)
11 Copyright |copy| 2014-2015 Scott Feldman <sfeldma@gmail.com>
14 The Ethernet switch device driver model (switchdev) is an in-kernel driver
15 model for switch devices which offload the forwarding (data) plane from the
18 Figure 1 is a block diagram showing the components of the switchdev model for
19 an example setup using a data-center-class switch ASIC chip. Other setups
20 with SR-IOV or soft switches, such as OVS, are possible.
25 User-space tools
28 +-------------------------------------------------------------------+
[all …]
/Documentation/admin-guide/laptops/
Dthinkpad-acpi.rst9 - Borislav Deianov <borislav@users.sf.net>
10 - Henrique de Moraes Holschuh <hmh@hmh.eng.br>
12 http://ibm-acpi.sf.net/
19 This driver used to be named ibm-acpi until kernel 2.6.21 and release
20 0.13-20070314. It used to be in the drivers/acpi tree, but it was
21 moved to the drivers/misc tree and renamed to thinkpad-acpi for kernel
25 The driver is named "thinkpad-acpi". In some places, like module
29 "tpacpi" is used as a shorthand where "thinkpad-acpi" would be too
33 ------
38 - Fn key combinations
[all …]
/Documentation/networking/pse-pd/
Dpse-pi.rst1 .. SPDX-License-Identifier: GPL-2.0
9 eight-pin modular jack, commonly known as the Ethernet RJ45 port. This
14 ---------------------------
19 - Section "33.2.3 PI pin assignments" covers the pin assignments for PoE
21 - Section "145.2.4 PSE PI" addresses the configuration for PoE systems that
25 -------------------------------
31 two pairs of wires, SPE operates on a simpler model due to its single-pair
33 assignments for power delivery, as described in the PSE PI for multi-pair
37 --------------------
47 ----------------------------
[all …]
/Documentation/sound/
Dalsa-configuration.rst2 Advanced Linux Sound Architecture - Driver Configuration guide
38 ----------
47 limiting card index for auto-loading (1-8);
49 For auto-loading more than one card, specify this option
50 together with snd-card-X aliases.
63 Module snd-pcm-oss
64 ------------------
86 regarding opening the device. When this option is non-zero,
90 Module snd-rawmidi
91 ------------------
[all …]
/Documentation/
Dmemory-barriers.txt18 resolved by referring to the formal memory consistency model and related
19 documentation at tools/memory-model/. Nevertheless, even this memory
20 model should be viewed as the collective opinion of its maintainers rather
37 Note also that it is possible that a barrier may be a no-op for an
46 (*) Abstract memory access model.
48 - Device operations.
49 - Guarantees.
53 - Varieties of memory barrier.
54 - What may not be assumed about memory barriers?
55 - Address-dependency barriers (historical).
[all …]
/Documentation/networking/device_drivers/can/ctu/
Dctucanfd-driver.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
10 ------------------------
19 `Vivado integration <https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top>`_
20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board
21 `QSys integration <https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd>`_
23 `PCIe integration <https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd>`_ of the core.
30 The basic functional model of the CTU CAN FD peripheral has been
33 version of emulation support can be cloned from ctu-canfd branch of QEMU local
34 development `repository <https://gitlab.fel.cvut.cz/canbus/qemu-canbus>`_.
38 ---------------
[all …]
/Documentation/mm/damon/
Ddesign.rst1 .. SPDX-License-Identifier: GPL-2.0
10 Execution Model and Data Structures
13 The monitoring-related information including the monitoring request
14 specification and DAMON-based operation schemes are stored in a data structure
19 To know how user-space can do the configurations and start/stop DAMON, refer to
28 - :ref:`Operations Set <damon_operations_set>`: Implements fundamental
30 address-space and available set of software/hardware primitives,
31 - :ref:`Core <damon_core_logic>`: Implements core logics including monitoring
32 overhead/accuracy control and access-aware system operations on top of the
34 - :ref:`Modules <damon_modules>`: Implements kernel modules for various
[all …]

12