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/Documentation/devicetree/bindings/extcon/
Dmaxim,max77843.yaml31 Any connector to the data bus of this controller should be modelled using
/Documentation/userspace-api/media/mediactl/
Dmedia-controller-intro.rst14 be modelled as separate devices. A USB camera with a microphone will be
Dmedia-controller-model.rst10 hardware devices and Linux Kernel interfaces are modelled as graph
/Documentation/gpu/
Dtegra.rst75 on two outputs don't match. A display controller is modelled as a CRTC in KMS
94 content. In KMS, each window is modelled as a plane. Each display controller
105 Outputs are modelled as a composite encoder/connector pair.
/Documentation/devicetree/bindings/spmi/
Dspmi.yaml16 SPMI controllers are modelled in device tree using a generic set of
/Documentation/fb/
Dcirrusfb.rst57 modelled after that in atyfb and matroxfb.
/Documentation/devicetree/bindings/usb/
Drenesas,usb3-peri.yaml75 any connector to the data bus of this controller should be modelled
Ddwc2.yaml169 Any connector to the data bus of this controller should be modelled
Dchipidea,usb2-common.yaml180 Any connector to the data bus of this controller should be modelled
Dmediatek,mtu3.yaml153 Any connector to the data bus of this controller should be modelled
/Documentation/admin-guide/media/
Domap3isp.rst51 Each possible link in the ISP is modelled by a link in the Media controller
Dipu3.rst48 receiver and DMA engine. Each channel is modelled as a V4L2 sub-device exposed
144 The ImgU contains two independent pipes, each modelled as a V4L2 sub-device
/Documentation/driver-api/thermal/
Dcpu-cooling-api.rst91 The detailed behaviour for f(run) could be modelled on-line. However,
/Documentation/devicetree/bindings/regulator/
Dqcom,rpm-regulator.yaml10 The Qualcomm RPM regulator is modelled as a subdevice of the RPM.
Dqcom,smd-rpm-regulator.yaml10 The Qualcomm RPM over SMD regulator is modelled as a subdevice of the RPM.
Dmaxim,max8997.yaml153 32768 Hz clock output (modelled as regulator)
/Documentation/devicetree/bindings/phy/
Dsamsung,usb3-drd-phy.yaml57 Any connector to the data bus of this controller should be modelled using
/Documentation/devicetree/bindings/media/i2c/
Dmaxim,max9286.yaml154 Each GMSL link is modelled as a child bus of an i2c bus multiplexer/switch.
/Documentation/virt/kvm/x86/
Drunning-nested-guests.rst38 .. note:: The above diagram is modelled after the x86 architecture;
/Documentation/driver-api/usb/
Dwriting_usb_driver.rst30 have written a generic USB driver skeleton, modelled after the
Dwriting_musb_glue_layer.rst22 Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the
/Documentation/driver-api/media/
Dmc-core.rst18 modelled as an oriented graph of building blocks called entities connected
/Documentation/networking/
Dfilter.rst191 closely modelled after Steven McCanne's and Van Jacobson's BPF paper.
624 paragraphs is being used. However, the instruction set format is modelled
/Documentation/driver-api/
Dpin-control.rst281 but internally several GPIO silicon blocks, each modelled as a struct
Dparport-lowlevel.rst85 modelled after common PC implementations. Other low-level drivers may