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/Documentation/devicetree/bindings/clock/
Dti-clkctrl.txt4 interconnect target module. The clkctrl clock controller manages functional
5 and interface clocks for each module. Each clkctrl controller can also
6 gate one or more optional functional clocks for a module, and can have one
8 interconnect target module on omap4 and later variants.
11 the hardware offset from the clkctrl instance register space. The optional
16 Documentation/devicetree/bindings/clock/clock-bindings.txt.
19 - compatible : shall be "ti,clkctrl" or a clock domain specific name:
20 "ti,clkctrl-l4-cfg"
21 "ti,clkctrl-l4-per"
22 "ti,clkctrl-l4-secure"
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Dqcom,gcc-qcs404.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Qualcomm global clock control module provides the clocks, resets and power
17 See also:: include/dt-bindings/clock/qcom,gcc-qcs404.h
21 const: qcom,gcc-qcs404
25 - description: XO source
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Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Qualcomm multimedia clock control module provides the clocks, resets and
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
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Dqcom,gcc-msm8916.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Qualcomm global clock control module provides the clocks, resets and power
18 include/dt-bindings/clock/qcom,gcc-msm8916.h
19 include/dt-bindings/clock/qcom,gcc-msm8939.h
20 include/dt-bindings/reset/qcom,gcc-msm8916.h
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Dqcom,gcc-msm8909.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
13 Qualcomm global clock control module provides the clocks, resets and power
17 include/dt-bindings/clock/qcom,gcc-msm8909.h
18 include/dt-bindings/clock/qcom,gcc-msm8917.h
23 - qcom,gcc-msm8909
24 - qcom,gcc-msm8917
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/Documentation/driver-api/surface_aggregator/clients/
Dcdev.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 User-Space EC Interface (cdev)
11 The ``surface_aggregator_cdev`` module provides a misc-device for the SSAM
12 controller to allow for a (more or less) direct connection from user-space to
15 module is not loaded automatically, but instead must be loaded manually.
18 device-file. All functionality of this interface is provided via IOCTLs.
23 at https://github.com/linux-surface/surface-aggregator-module/tree/master/scripts/ssam.
31 Events can be received by reading from the device-file. The are represented by
37 interface, associated with a specific target category and device-file-instance.
39 instance, from which it can then be read.
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/Documentation/driver-api/firmware/
Dfw_search_path.rst8 * fw_path_para - module parameter - default is empty so this is ignored
14 The module parameter ''path'' can be passed to the firmware_class module
23 * /sys/module/firmware_class/parameters/path
27 and may not produce the intended effects. For instance you might want to use:
29 echo -n /path/to/script > /sys/module/firmware_class/parameters/path
/Documentation/devicetree/bindings/phy/
Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
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Dlantiq,vrx200-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 "#phy-cells":
15 description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
19 - lantiq,vrx200-pcie-phy
20 - lantiq,arx300-pcie-phy
27 - description: PHY module clock
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/Documentation/devicetree/bindings/power/
Dti-smartreflex.txt9 "ti,omap3-smartreflex-core"
10 "ti,omap3-smartreflex-mpu-iva"
11 "ti,omap4-smartreflex-core"
12 "ti,omap4-smartreflex-mpu"
13 "ti,omap4-smartreflex-iva"
15 reg: Shall contain the device instance IO range
17 interrupts: Shall contain the device instance interrupt
22 ti,hwmods: Shall contain the TI interconnect module name if needed
29 compatible = "ti,omap4-smartreflex-iva";
36 compatible = "ti,omap4-smartreflex-core";
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/Documentation/admin-guide/media/
Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
29 - Support for various pixel aspect ratios and video aspect ratios
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/Documentation/devicetree/bindings/usb/
Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
8 at least a control module node, USB node and a PHY node. The second USB
11 Reset module
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
15 Module" block. A second offset and length for the USB wake up control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
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/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-dma.txt8 CRYPTO Engines etc has its own instance of dma hardware. QMSS has also
9 an internal packet DMA module which is used as an infrastructure DMA
13 ------------------
15 ------------------
17 |-> DMA instance #0
19 |-> DMA instance #1
23 |-> DMA instance #n
27 - compatible: Should be "ti,keystone-navigator-dma"
28 - clocks: phandle to dma instances clocks. The clock handles can be as
31 - ti,navigator-cloud-address: Should contain base address for the multi-core
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/Documentation/networking/
Dfailover.rst1 .. SPDX-License-Identifier: GPL-2.0
10 The failover module provides a generic interface for paravirtual drivers
11 to register a netdev and a set of ops with a failover instance. The ops
/Documentation/driver-api/media/
Dv4l2-device.rst1 .. SPDX-License-Identifier: GPL-2.0
3 V4L2 device instance
4 --------------------
6 Each device instance is represented by a struct v4l2_device.
10 You must register the device instance by calling:
16 dev->driver_data field is ``NULL``, it will be linked to
20 dev->driver_data manually to point to the driver-specific device structure
21 that embed the struct v4l2_device instance. This is achieved by a
22 ``dev_set_drvdata()`` call before registering the V4L2 device instance.
24 properly initialized and registered :c:type:`media_device` instance.
[all …]
/Documentation/devicetree/bindings/firmware/
Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
18 in the LSIO subsystem. The current definition of this MU module provides
20 (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
26 const: fsl,imx-scu
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/Documentation/gpu/
Dvgaarbiter.rst7 implemented on PCI will typically have the same "hard-decoded" addresses as
8 they did on ISA. For more details see "PCI Bus Binding to IEEE Std 1275-1994
12 The Resource Access Control (RAC) module inside the X server [0] existed for
14 than one legacy device co-exists on the same machine. But the problem happens
23 ---------------------------
25 The vgaarb is a module of the Linux Kernel. When it is initially loaded, it
35 Opens a user instance of the arbiter. By default, it's attached to the
39 Close a user instance. Release locks made by the user
51 unplugged, we get "invalid" then for card_ID and an -ENODEV
63 non-blocking acquire locks on target (returns EBUSY if
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/Documentation/devicetree/bindings/net/bluetooth/
Dbrcm,bcm4377-bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/brcm,bcm4377-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
13 This binding describes Broadcom BCM4377 family PCIe-attached bluetooth chips
14 usually found in Apple machines. The Wi-Fi part of the chip is described in
15 bindings/net/wireless/brcm,bcm4329-fmac.yaml.
18 - $ref: bluetooth-controller.yaml#
23 - pci14e4,5fa0 # BCM4377
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/Documentation/userspace-api/
Dvduse.rst2 VDUSE - "vDPA Device in Userspace"
9 possible to implement software-emulated vDPA devices in userspace. And
21 ----------------------------
25 1. Create a new VDUSE instance with ioctl(VDUSE_CREATE_DEV) on
31 messages will arrive while attaching the VDUSE instance to vDPA bus.
34 instance to vDPA bus.
39 instance from vDPA bus.
43 3. Destroy the VDUSE instance with ioctl(VDUSE_DESTROY_DEV) on
49 .. code-block:: c
59 return -ENOMEM;
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/Documentation/driver-api/media/drivers/
Dpvrusb2.rst1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
38 tear-down, arbitration, and interaction with high level
61 --------
70 --------------------------------------
72 (Note: The term "module" used below generally refers to loosely
74 relation to the Linux kernel's concept of a loadable module.)
76 pvrusb2-audio.[ch] - This is glue logic that resides between this
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/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
17 This module is purely combinatorial.
19 The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.
20 The CSR module, as a system controller, contains the PXL2DPI's configuration
[all …]
/Documentation/devicetree/bindings/platform/
Dmicrosoft,surface-sam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/platform/microsoft,surface-sam.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Surface System Aggregator Module (SAM, SSAM)
10 - Konrad Dybcio <konradybcio@kernel.org>
16 five levels: domain, category, target, instance and function.
20 const: microsoft,surface-sam
25 current-speed: true
28 - compatible
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/Documentation/crypto/
Dasymmetric-keys.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Asymmetric / Public-key Cryptography Key Type
9 - Overview.
10 - Key identification.
11 - Accessing asymmetric keys.
12 - Signature verification.
13 - Asymmetric key subtypes.
14 - Instantiation data parsers.
15 - Keyring link restrictions.
22 public-key cryptography, without imposing any particular restrictions on the
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/Documentation/arch/riscv/
Dpatch-acceptance.rst1 .. SPDX-License-Identifier: GPL-2.0
7 --------
8 The RISC-V instruction set architecture is developed in the open:
9 in-progress drafts are available for all to review and to experiment
10 with implementations. New module or extension drafts can change
11 during the development process - sometimes in ways that are
13 challenge for RISC-V Linux maintenance. Linux maintainers disapprove
14 of churn, and the Linux development process prefers well-reviewed and
16 principles to the RISC-V-related code that will be accepted for
20 ---------
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/Documentation/usb/
Dfunctionfs.rst28 For more information about FunctionFS descriptors see :doc:`functionfs-desc`
43 each FunctionFS instance is identified by the device name used
51 $ mkdir /dev/ffs-mtp && mount -t functionfs mtp /dev/ffs-mtp
52 $ ( cd /dev/ffs-mtp && mtp-daemon ) &
53 $ mkdir /dev/ffs-hid && mount -t functionfs hid /dev/ffs-hid
54 $ ( cd /dev/ffs-hid && hid-daemon ) &
56 On kernel level the gadget checks ffs_data->dev_name to identify
59 If no "functions" module parameters is supplied, the driver accepts
62 When "functions" module parameter is supplied, only functions
64 parameter's value is just a one-element list, then the behaviour
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