Searched full:mss (Results 1 – 21 of 21) sorted by relevance
| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,msm8996-mss-pil.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml# 7 title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar) 14 MSS Peripheral Image Loader loads and boots firmware on the 20 - qcom,msm8996-mss-pil 21 - qcom,msm8998-mss-pil 22 - qcom,sdm660-mss-pil 23 - qcom,sdm845-mss-pil 27 - description: MSS QDSP6 registers 70 - description: MSS power domain (only valid for qcom,sdm845-mss-pil) 77 - const: mss # only valid for qcom,sdm845-mss-pil [all …]
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| D | qcom,msm8916-mss-pil.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# 7 title: Qualcomm MSM8916 MSS Peripheral Image Loader (and similar) 20 - qcom,msm8909-mss-pil 21 - qcom,msm8916-mss-pil 22 - qcom,msm8953-mss-pil 23 - qcom,msm8974-mss-pil 26 description: Deprecated, prefer using qcom,msm8916-mss-pil 31 - description: MSS QDSP6 registers 73 - description: MSS proxy power domain (control handed over after startup) 74 (only valid for qcom,msm8953-mss-pil) [all …]
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| D | qcom,sc7180-mss-pil.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml# 7 title: Qualcomm SC7180 MSS Peripheral Image Loader 19 - qcom,sc7180-mss-pil 23 - description: MSS QDSP6 registers 56 - description: GCC MSS IFACE clock 57 - description: GCC MSS BUS clock 58 - description: GCC MSS NAV clock 59 - description: GCC MSS SNOC_AXI clock 60 - description: GCC MSS MFAB_AXIS clock 76 - description: MSS power domain [all …]
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| D | qcom,sc7280-mss-pil.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml# 7 title: Qualcomm SC7280 MSS Peripheral Image Loader 19 - qcom,sc7280-mss-pil 23 - description: MSS QDSP6 registers 60 - description: GCC MSS IFACE clock 61 - description: GCC MSS OFFLINE clock 62 - description: GCC MSS SNOC_AXI clock 77 - description: MSS power domain 82 - const: mss 110 within MSS. [all …]
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| D | qcom,sc7180-pas.yaml | 104 - description: MSS power domain 109 - const: mss 121 - description: MSS power domain 125 - const: mss 174 power-domain-names = "cx", "mx", "mss";
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| D | qcom,sdx55-pas.yaml | 41 - description: MSS power domain 46 - const: mss 97 power-domain-names = "cx", "mss";
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| D | qcom,sm6350-pas.yaml | 116 - description: MSS power domain 120 - const: mss
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| D | qcom,sm8150-pas.yaml | 108 - description: MSS power domain 112 - const: mss
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| D | qcom,sm8350-pas.yaml | 94 - description: MSS power domain 98 - const: mss
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| D | qcom,sm8550-pas.yaml | 159 - description: MSS power domain 163 - const: mss
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| /Documentation/devicetree/bindings/soc/microchip/ |
| D | microchip,mpfs-sys-controller.yaml | 7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller 35 for Auto Update. The MSS and system controller have separate QSPI 37 MSS can write bitstreams to the flash.
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| /Documentation/devicetree/bindings/clock/ |
| D | microchip,mpfs-clkcfg.yaml | 32 mss pll dri registers: 33 Block of registers responsible for dynamic reconfiguration of the mss
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| /Documentation/netlink/specs/ |
| D | tcp_metrics.yaml | 54 name: fopen-mss 153 - fopen-mss
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| /Documentation/devicetree/bindings/mailbox/ |
| D | microchip,mpfs-mailbox.yaml | 7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | ap80x-system-controller.txt | 27 - 3: MSS clock, derived from the fixed PLL
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| /Documentation/networking/ |
| D | segmentation-offloads.rst | 113 out over multiple skbuffs that have been resized to match the MSS provided
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| D | ip-sysctl.rst | 232 The advertised MSS depends on the first hop route MTU, but will 355 Reserve max(window/2^tcp_app_win, mss) of window for application 381 this is the initial MSS used by the connection. 384 If MTU probing is enabled this caps the minimum MSS used for search_low 607 - 2 - Always enabled, use initial MSS of tcp_base_mss. 957 to current rate. (current_rate = cwnd * mss / srtt) 966 to current rate. (current_rate = cwnd * mss / srtt)
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| D | snmp_counter.rst | 977 The MSS decoded from the SYN cookie is invalid. When this counter is 1218 …ts sack cubic wscale:7,7 rto:204 rtt:0.98/0.49 mss:1448 pmtu:1500 rcvmss:536 advmss:1448 cwnd:10 b…
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| D | bonding.rst | 2062 Destination Gateway Genmask Flags MSS Window irtt Iface
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| /Documentation/input/devices/ |
| D | atarikbd.rst | 246 %00000mss ; mouse button action 248 ; mss=0xy, mouse button press or release causes mouse 252 ; mss=100, mouse buttons act like keys
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| /Documentation/sound/ |
| D | alsa-configuration.rst | 2027 MSS Port # (0x530 or 0xe80)
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