Searched +full:mt8183 +full:- +full:dsi (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek DSI Controller10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>11 - Philipp Zabel <p.zabel@pengutronix.de>12 - Jitao Shi <jitao.shi@mediatek.com>15 The MediaTek DSI function block is a sink of the display subsystem and can16 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>11 - Philipp Zabel <p.zabel@pengutronix.de>15 data into DMA. It provides real time data to the back-end panel16 driver, such as DSI, DPI and DP_INTF.26 - enum:27 - mediatek,mt2701-disp-rdma28 - mediatek,mt8173-disp-rdma[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: MediaTek MIPI Display Serial Interface (DSI) PHY11 - Chun-Kuang Hu <chunkuang.hu@kernel.org>12 - Philipp Zabel <p.zabel@pengutronix.de>13 - Chunfeng Yun <chunfeng.yun@mediatek.com>15 description: The MIPI DSI PHY supports up to 4-lane output.19 pattern: "^dsi-phy@[0-9a-f]+$"[all …]