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| /Documentation/sound/hd-audio/ |
| D | controls.rst | 2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
12 This is an enum control to change the surround-channel setup,
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
21 and/or line-out jacks are available on a machine, this controls
23 When there are only either headphones or line-out jacks, it gives
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| /Documentation/sound/cards/ |
| D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
61 --------------------------
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| /Documentation/devicetree/bindings/mtd/ |
| D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
24 Each flash chip described may optionally contain additional sub-nodes
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| D | mxic-nand.txt | 2 -------------------------------------------------
5 - compatible: should be "mxic,multi-itfc-v009-nand-controller"
6 - reg: should contain 1 entry for the registers
7 - #address-cells: should be set to 1
8 - #size-cells: should be set to 0
9 - interrupts: interrupt line connected to this raw NAND controller
10 - clock-names: should contain "ps", "send" and "send_dly"
11 - clocks: should contain 3 phandles for the "ps", "send" and
15 - children nodes represent the available NAND chips.
17 See Documentation/devicetree/bindings/mtd/nand-controller.yaml
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| /Documentation/devicetree/bindings/mfd/ |
| D | retu.txt | 1 * Device tree bindings for Nokia Retu and Tahvo multi-function device
3 Retu and Tahvo are a multi-function devices found on Nokia Internet
9 - compatible: "nokia,retu" or "nokia,tahvo"
10 - reg: Specifies the CBUS slave address of the ASIC chip
11 - interrupts: The interrupt line the device is connected to
16 compatible = "i2c-cbus-gpio";
20 interrupt-parent = <&gpio4>;
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| /Documentation/arch/s390/ |
| D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 - Pierre Morel
13 Command line parameters and debugfs entries
16 Command line parameters
17 -----------------------
28 ---------------
36 - /sys/kernel/debug/s390dbf/pci_msg/sprintf
56 - /sys/bus/pci/slots/XXXXXXXX/power
64 - function_id
67 - function_handle
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| /Documentation/devicetree/bindings/ |
| D | .yamllint | 4 quoted-strings:
5 required: only-when-needed
6 extra-allowed:
7 - '[$^,[]'
8 - '^/$'
9 line-length:
10 # 80 chars should be enough, but don't fail if a line is longer
12 allow-non-breakable-words: true
15 min-spaces-inside: 0
16 max-spaces-inside: 1
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| D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 interrupt line.
27 spi-max-frequency: true
32 - enum:
34 - acbel,fsg032
35 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | kontron,sl28cpld-intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/kontron,sl28cpld-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Walle <michael@walle.cc>
13 This module is part of the sl28cpld multi-function device. For more
20 IRQ line/device description
22 0 RTC_INT# Interrupt line from on-board RTC
23 1 SMB_ALERT# Event on SMB_ALERT# line (P1)
24 2 ESPI_ALERT0# Event on ESPI_ALERT0# line (S43)
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| D | openrisc,ompic.txt | 1 Open Multi-Processor Interrupt Controller
5 - compatible : This should be "openrisc,ompic"
6 - reg : Specifies base physical address and size of the register space. The
9 - interrupt-controller : Identifies the node as an interrupt controller.
10 - #interrupt-cells : This should be set to 0 as this will not be an irq
12 - interrupts : Specifies the interrupt line to which the ompic is wired.
16 ompic: interrupt-controller@98000000 {
19 interrupt-controller;
20 #interrupt-cells = <0>;
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| /Documentation/userspace-api/gpio/ |
| D | chardev.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 Read Documentation/driver-api/gpio/drivers-on-gpio.rst to avoid reinventing
21 Similarly, for multi-function lines there may be other subsystems, such as
23 Documentation/driver-api/pwm.rst, Documentation/w1/index.rst etc, that
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
41 ``offset`` in the range from 0 to ``chip.lines - 1``, i.e. `[0,chip.lines)`.
43 Lines are requested from the chip using gpio-v2-get-line-ioctl.rst
44 and the resulting line request is used to access the GPIO chip's lines or
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| /Documentation/arch/mips/ |
| D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
26 - Each TCU channel works in one of two modes:
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| /Documentation/gpu/amdgpu/display/ |
| D | dc-glossary.rst | 7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
108 Display Micro-Controller Unit
111 Display Micro-Controller Unit, version B
156 Line Buffer
177 Multi Plane Overlay
180 Multi Stream Transport
225 Transition-Minimized Differential Signaling
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| /Documentation/devicetree/bindings/dma/ |
| D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC)
4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
6 - interrupts: Must contain all the per-channel DMA interrupts.
7 - clocks: Must contain an entry for each entry in clock-names.
8 See ../clock/clock-bindings.txt for details.
9 - clock-names: Must include the following entries:
10 - sys: MDC system interface clock.
11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
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| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: dma-controller.yaml#
19 - const: snps,dma-spear1340
20 - items:
21 - enum:
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| /Documentation/devicetree/bindings/gpio/ |
| D | kontron,sl28cpld-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/kontron,sl28cpld-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Walle <michael@walle.cc>
13 This module is part of the sl28cpld multi-function device. For more
17 input/output with interrupt support (kontron,sl28cpld-gpio), one
18 output-only (kontron,sl28-gpo) and one input-only (kontron,sl28-gpi).
25 - kontron,sl28cpld-gpio
26 - kontron,sl28cpld-gpi
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| /Documentation/staging/ |
| D | xz.rst | 1 .. SPDX-License-Identifier: 0BSD
19 For userspace, `XZ Utils`_ provide a zlib-like compression library
20 and a gzip-like command line tool.
28 The xz_dec module provides XZ decompressor with single-call (buffer
29 to buffer) and multi-call (stateful) APIs in include/linux/xz.h.
39 - ``$(call if_changed,xzkern)`` is for compressing the kernel image.
40 It runs the script scripts/xz_wrap.sh which uses arch-optimized
43 - ``$(call if_changed,xzkern_with_size)`` is like ``xzkern`` above but
44 this also appends a four-byte trailer containing the uncompressed size
47 - Other things can be compressed with ``$(call if_needed,xzmisc)``
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| /Documentation/doc-guide/ |
| D | kernel-doc.rst | 1 .. title:: Kernel-doc comments
4 Writing kernel-doc comments
8 comments in the kernel-doc format to describe the functions, types
9 and design of the code. It is easier to keep documentation up-to-date
12 .. note:: The kernel-doc format is deceptively similar to javadoc,
13 gtk-doc or Doxygen, yet distinctively different, for historical
14 reasons. The kernel source contains tens of thousands of kernel-doc
17 .. note:: kernel-doc does not cover Rust code: please see
18 Documentation/rust/general-information.rst instead.
20 The kernel-doc structure is extracted from the comments, and proper
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7944.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of pin-compatible single channel differential analog to digital
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad7944
27 - adi,ad7985
28 - adi,ad7986
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| /Documentation/arch/riscv/ |
| D | uabi.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 RISC-V Linux User ABI
7 ------------------------------------
14 #. Single-letter extensions come first, in canonical order.
17 #. All multi-letter extensions will be separated from other extensions by an
21 single-letter extensions and before any higher-privileged extensions.
29 #. Standard supervisor-level extensions (starting with 'S') will be listed
30 after standard unprivileged extensions. If multiple supervisor-level
33 #. Standard machine-level extensions (starting with 'Zxm') will be listed
34 after any lower-privileged, standard extensions. If multiple machine-level
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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| /Documentation/hwmon/ |
| D | mpq8785.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
15 -----------
17 The MPQ8785 is a fully integrated, PMBus-compatible, high-frequency, synchronous
19 40A output current per phase, with excellent load and line regulation over a
26 The MPQ8785 adopts MPS's proprietary multi-phase digital constant-on-time (MCOT)
29 with excellent current sharing and phase interleaving for high-current
32 Fully integrated protection features include over-current protection (OCP),
33 over-voltage protection (OVP), under-voltage protection (UVP), and
34 over-temperature protection (OTP).
41 - PMBus rev 1.3 interface.
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| /Documentation/admin-guide/hw-vuln/ |
| D | vmscape.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 guest-userspace may be able to attack the guest-kernel using the hypervisor as
14 -------------------
19 - Skylake generation (Parts without Enhanced-IBRS)
20 - Cascade Lake generation - (Parts affected by ITS guest/host separation)
21 - Alder Lake and newer (Parts affected by BHI)
27 - Zen series (families 0x17, 0x19, 0x1a)
30 - Family 0x18
33 ----------
36 ----------------
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-qcom-lpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-qcom-lpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
20 - enum:
21 - qcom,pm660l-lpg
22 - qcom,pm8150b-lpg
23 - qcom,pm8150l-lpg
24 - qcom,pm8350c-pwm
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| /Documentation/networking/device_drivers/ethernet/neterion/ |
| D | s2io.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Neterion's (Formerly S2io) Xframe I/II PCI-X 10GbE driver
7 Release notes for Neterion's (Formerly S2io) Xframe I/II PCI-X 10GbE driver.
10 - 1. Introduction
11 - 2. Identifying the adapter/interface
12 - 3. Features supported
13 - 4. Command line parameters
14 - 5. Performance suggestions
15 - 6. Available Downloads
20 This Linux driver supports Neterion's Xframe I PCI-X 1.0 and
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