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/Documentation/devicetree/bindings/mux/
Dmux-consumer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common multiplexer controller consumer
10 - Peter Rosin <peda@axentia.se>
13 Mux controller consumers should specify a list of mux controllers that they
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
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Dmux-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common multiplexer controller provider
10 - Peter Rosin <peda@axentia.se>
13 A multiplexer (or mux) controller will have one, or several, consumer devices
14 that uses the mux controller. Thus, a mux controller can possibly control
16 multiplexer needed by each consumer, but a single mux controller can of course
19 A mux controller provides a number of states to its consumers, and the state
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Dadi,adg792a.txt4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.yaml
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
[all …]
Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
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Dadi,adgs1408.txt1 Bindings for Analog Devices ADGS1408/1409 8:1/Dual 4:1 Mux
4 - compatible : Should be one of
7 * Standard mux-controller bindings as described in mux-controller.yaml
10 - gpio-controller : if present, #gpio-cells is required.
11 - #gpio-cells : should be <2>
12 - First cell is the GPO line number, i.e. 0 to 3
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, the state that the mux controller will have
28 * One mux controller.
29 * Mux state set to idle as is (no idle-state declared)
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Dgpio-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
22 const: gpio-mux
24 mux-gpios:
28 '#mux-control-cells':
31 '#mux-state-cells':
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/Documentation/devicetree/bindings/iio/multiplexer/
Dio-channel-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
16 For each non-empty string in the channels property, an io-channel will be
17 created. The number of this io-channel is the same as the index into the list
18 of strings in the channels property, and also matches the mux controller
19 state. The mux controller state is described in
20 Documentation/devicetree/bindings/mux/mux-controller.yaml
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/Documentation/devicetree/bindings/i2c/
Di2c-mux-gpmux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
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Di2c-mux-ltc4306.txt5 - compatible: Must contain one of the following.
7 - reg: The I2C address of the device.
11 - Standard I2C mux properties. See i2c-mux.yaml in this directory.
12 - I2C child bus nodes. See i2c-mux.yaml in this directory.
16 - enable-gpios: Reference to the GPIO connected to the enable input.
17 - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
20 - gpio-controller: Marks the device node as a GPIO Controller.
21 - #gpio-cells: Should be two. The first cell is the pin number and
24 - ltc,downstream-accelerators-enable: Enables the rise time accelerators
26 - ltc,upstream-accelerators-enable: Enables the rise time accelerators
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Di2c-mux-pca954x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pca954x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
23 - enum:
24 - maxim,max7356
25 - maxim,max7357
26 - maxim,max7358
27 - maxim,max7367
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Di2c-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
24 pattern: '^(i2c-?)?mux'
26 '#address-cells':
29 '#size-cells':
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/Documentation/devicetree/bindings/soc/microchip/
Dmicrochip,sparx5-cpu-syscon.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/microchip,sparx5-cpu-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars Povlsen <lars.povlsen@microchip.com>
15 - const: microchip,sparx5-cpu-syscon
16 - const: syscon
17 - const: simple-mfd
22 mux-controller:
23 $ref: /schemas/mux/reg-mux.yaml#
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/Documentation/devicetree/bindings/soc/ti/
Dti,am654-serdes-ctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/ti,am654-serdes-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nishanth Menon <nm@ti.com>
15 - const: ti,am654-serdes-ctrl
16 - const: syscon
17 - const: simple-mfd
22 mux-controller:
23 $ref: /schemas/mux/reg-mux.yaml#
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/Documentation/devicetree/bindings/clock/
Dnxp,imx95-display-master-csr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
15 - const: nxp,imx95-display-master-csr
16 - const: syscon
21 power-domains:
27 '#clock-cells':
32 include/dt-bindings/clock/nxp,imx95-clock.h
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/Documentation/devicetree/bindings/interrupt-controller/
Dmrvl,intc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP/Orion Interrupt controller
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
14 - if:
19 const: marvell,orion-intc
22 - mrvl,intc-nr-irqs
[all …]
/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx-iomuxc-gpr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale IOMUX Controller General Purpose Registers
10 - Peng Fan <peng.fan@nxp.com>
19 - items:
20 - enum:
21 - fsl,imx6q-iomuxc-gpr
22 - fsl,imx8mq-iomuxc-gpr
[all …]
/Documentation/devicetree/bindings/sound/
Dmt8186-afe-pcm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AFE PCM controller for mt8186
10 - Jiaxin Yu <jiaxin.yu@mediatek.com>
14 const: mediatek,mt8186-sound
25 reset-names:
30 description: The phandle of the mediatek apmixedsys controller
34 description: The phandle of the mediatek infracfg controller
[all …]
Deukrea-tlv320.txt5 - compatible : "eukrea,asoc-tlv320"
7 - eukrea,model : The user-visible name of this sound complex.
9 - ssi-controller : The phandle of the SSI controller.
11 - fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
13 - fsl,mux-ext-port : The external port of the i.MX audio muxer.
21 compatible = "eukrea,asoc-tlv320";
22 eukrea,model = "imx51-eukrea-tlv320aic23";
23 ssi-controller = <&ssi2>;
24 fsl,mux-int-port = <2>;
25 fsl,mux-ext-port = <3>;
Dimx-audio-sgtl5000.txt5 - compatible : "fsl,imx-audio-sgtl5000"
7 - model : The user-visible name of this sound complex
9 - ssi-controller : The phandle of the i.MX SSI controller
11 - audio-codec : The phandle of the SGTL5000 audio codec
13 - audio-routing : A list of the connections between audio components.
35 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
37 - mux-ext-port : The external port of the i.MX audio muxer
45 compatible = "fsl,imx51-babbage-sgtl5000",
46 "fsl,imx-audio-sgtl5000";
47 model = "imx51-babbage-sgtl5000";
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dcortina,gemini-pinctrl.txt1 Cortina Systems Gemini pin controller
3 This pin controller is found in the Cortina Systems Gemini SoC family,
4 see further arm/gemini.txt. It is a purely group-based multiplexing pin
5 controller.
7 The pin controller node must be a subnode of the system controller node.
10 - compatible: "cortina,gemini-pinctrl"
12 Subnodes of the pin controller contain pin control multiplexing set-up
15 Please refer to pinctrl-bindings.txt for generic pin multiplexing nodes
19 - skew-delay is supported on the Ethernet pins
20 - drive-strength with 4, 8, 12 or 16 mA as argument is supported for
[all …]
/Documentation/devicetree/bindings/media/
Dvideo-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/video-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 described by this binding are controlled by a multiplexer controller.
20 const: video-mux
22 mux-controls:
25 '#address-cells':
[all …]
/Documentation/devicetree/bindings/net/
Dmdio-mux-multiplexer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
14 of a mux producer device. The mux producer can be of any type like mmio mux
15 producer, gpio mux producer or generic register based mux producer.
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: mdio-mux-multiplexer
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/Documentation/devicetree/bindings/board/
Dfsl,fpga-qixis-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/board/fsl,fpga-qixis-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale on-board FPGA connected on I2C bus
10 - Frank Li <Frank.Li@nxp.com>
15 - items:
16 - enum:
17 - fsl,bsc9132qds-fpga
18 - const: fsl,fpga-qixis-i2c
[all …]
/Documentation/devicetree/bindings/spi/
Dspi-mux.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 signals. This can be used when you need more devices than the SPI controller
13 setting of the multiplexer to a channel needs to be done by a specific SPI mux
16 MOSI /--------------------------------+--------+--------+--------\
17 MISO |/------------------------------+|-------+|-------+|-------\|
18 SCL ||/----------------------------+||------+||------+||------\||
20 +------------+ ||| ||| ||| |||
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/Documentation/i2c/
Di2c-sysfs.rst1 .. SPDX-License-Identifier: GPL-2.0
10 I2C topology can be complex because of the existence of I2C MUX
12 kernel abstracts the MUX channels into logical I2C bus numbers. However, there
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
18 useful and essential to use ``i2c-tools`` for the purpose of development and
22 ---------------
28 -------------
32 2. General knowledge of I2C, I2C MUX and I2C topology.
41 start with ``i2c-`` are I2C buses, which may be either physical or logical. The
48 0-0008 0-0061 1-0028 3-0043 4-0036 4-0041 i2c-1 i2c-3
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