Searched +full:nand +full:- +full:rb (Results 1 – 10 of 10) sorted by relevance
| /Documentation/devicetree/bindings/mtd/ |
| D | marvell,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell NAND Flash Controller (NFC) 10 - Miquel Raynal <miquel.raynal@bootlin.com> 15 - items: 16 - const: marvell,armada-8k-nand-controller 17 - const: marvell,armada370-nand-controller 18 - enum: [all …]
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| D | amlogic,meson-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs 10 - $ref: nand-controller.yaml 13 - liang.yang@amlogic.com 18 - amlogic,meson-gxl-nfc 19 - amlogic,meson-axg-nfc 24 reg-names: [all …]
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| D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments GPMC NAND Flash controller. 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 GPMC NAND controller/Flash is represented as a child of the 20 - enum: 21 - ti,am64-nand [all …]
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| D | raw-nand-chip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Raw NAND Chip Common Properties 10 - Miquel Raynal <miquel.raynal@bootlin.com> 13 - $ref: nand-chip.yaml# 19 {size} bytes for a particular raw NAND chip. 21 The interpretation of these parameters is implementation-defined, so 28 pattern: "^nand@[a-f0-9]$" [all …]
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| D | atmel-nand.txt | 1 Atmel NAND flash controller bindings 3 The NAND flash controller node should be defined under the EBI bus (see 4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt). 5 One or several NAND devices can be defined under this NAND controller. 6 The NAND controller might be connected to an ECC engine. 8 * NAND controller bindings: 11 - compatible: should be one of the following 12 "atmel,at91rm9200-nand-controller" 13 "atmel,at91sam9260-nand-controller" 14 "atmel,at91sam9261-nand-controller" [all …]
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| D | allwinner,sun4i-a10-nand.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A10 NAND Controller 10 - $ref: nand-controller.yaml 13 - Chen-Yu Tsai <wens@csie.org> 14 - Maxime Ripard <mripard@kernel.org> 19 - allwinner,sun4i-a10-nand 20 - allwinner,sun8i-a23-nand-controller [all …]
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| D | ingenic,nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ingenic SoCs NAND controller 10 - Paul Cercueil <paul@crapouillou.net> 13 - $ref: nand-controller.yaml# 14 - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml# 19 - ingenic,jz4740-nand 20 - ingenic,jz4725b-nand [all …]
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash 18 - NAND flash 19 - Pseudo-SRAM devices [all …]
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-xp-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl", 8 "marvell,mv78460-pinctrl" 9 - reg: register specifier of MPP registers 50 mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk) 61 mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0), 63 mpp41 41 gpio, spi0(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt), 76 mpp48 48 gpio, dev(clkout), dev(burst/last), nand(rb)
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| /Documentation/filesystems/ |
| D | f2fs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 WHAT IS Flash-Friendly File System (F2FS)? 7 NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have 13 F2FS is a file system exploiting NAND flash memory-based storage devices, which 14 is based on Log-structured File System (LFS). The design has been focused on 18 Since a NAND flash memory-based storage device shows different characteristic 20 F2FS and its tools support various parameters not only for configuring on-disk 26 - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git 30 - linux-f2fs-devel@lists.sourceforge.net 34 - https://bugzilla.kernel.org/enter_bug.cgi?product=File%20System&component=f2fs [all …]
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