Searched full:nano (Results 1 – 25 of 26) sorted by relevance
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 68 enable (WE signal) in nano seconds.
71 enable (OE signal) in nano seconds.
74 access in nano seconds.
77 access in nano seconds.
80 accesses in nano seconds.
82 - mpmc,turn-round-delay: Delay between access to memory banks in nano
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| /Documentation/devicetree/bindings/riscv/ |
| D | sophgo.yaml | 31 - sipeed,licheerv-nano-b
32 - const: sipeed,licheerv-nano
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,ltc4282.yaml | 33 adi,rsense-nano-ohms:
140 - adi,rsense-nano-ohms
153 adi,rsense-nano-ohms = <500>;
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| /Documentation/i2c/busses/ |
| D | scx200_acb.rst | 5 Author: Christer Weinigel <wingel@nano-system.com>
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| /Documentation/driver-api/backlight/ |
| D | lp855x-driver.rst | 48 Platform specific PWM period value. unit is nano.
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx8m-pinctrl.yaml | 43 pin. Please refer to i.MX8M Mini/Nano/Plus/Quad Reference Manual for
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| /Documentation/devicetree/bindings/arm/ |
| D | tegra.yaml | 234 - description: Jetson Orin Nano
238 - description: Jetson Orin Nano Developer Kit
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| D | sunxi.yaml | 54 - description: Anbernic RG-Nano
56 - const: anbernic,rg-nano
442 - description: Lichee Pi Nano
444 - const: licheepi,licheepi-nano
484 - description: Linksprite PCDuino3 Nano
486 - const: linksprite,pcduino3-nano
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-rockchip.yaml | 72 Nano seconds to delay after the SCLK edge before sampling Rx data
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| /Documentation/devicetree/bindings/clock/ |
| D | imx8m-clock.yaml | 14 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr2-timings.yaml | 50 Row active time in nano seconds.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-siox | 41 Defines the interval between two poll cycles in nano seconds.
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | samsung,mipi-dsim.yaml | 16 and i.MX8M Mini/Nano/Plus SoC's.
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| /Documentation/crypto/ |
| D | api-samples.rst | 139 char *hash_alg_name = "sha1-padlock-nano";
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| /Documentation/arch/openrisc/ |
| D | openrisc_port.rst | 46 an SoC into an FPGA. The below is an example of programming a De0 Nano
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| /Documentation/admin-guide/media/ |
| D | cx88-cardlist.rst | 254 - DViCO FusionHDTV 5 PCI nano
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| D | em28xx-cardlist.rst | 362 - PCTV QuatroStick nano (520e)
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| /Documentation/fb/ |
| D | udlfb.rst | 98 sudo nano PARAMETER_NAME
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| /Documentation/trace/coresight/ |
| D | coresight.rst | 459 linaro@linaro-nano:~$ ./perf list pmu
465 linaro@linaro-nano:~$
486 root@linaro-nano:~# perf record -e cs_etm/@tmc_etr0/u --per-thread program
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| /Documentation/scsi/ |
| D | sym53c8xx_2.rst | 368 - 9 means 12.5 nano-seconds synchronous period
369 - 10 means 25 nano-seconds synchronous period
370 - 11 means 30 nano-seconds synchronous period
371 - 12 means 50 nano-seconds synchronous period
697 Since SCSI devices shall release the BUS at most 800 nano-seconds after SCSI
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| D | ncr53c8xx.rst | 500 - 10 means 25 nano-seconds synchronous period
501 - 11 means 30 nano-seconds synchronous period
502 - 12 means 50 nano-seconds synchronous period
1216 Since SCSI devices shall release the BUS at most 800 nano-seconds after SCSI
1629 Periods are in nano-seconds and speeds are in Mega-transfers per second.
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| /Documentation/networking/device_drivers/ethernet/dlink/ |
| D | dl2k.rst | 251 reach timeout of n * 640 nano seconds.
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| /Documentation/watchdog/ |
| D | watchdog-api.rst | 9 Copyright 2002 Christer Weingel <wingel@nano-system.com>
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| /Documentation/networking/device_drivers/can/ctu/ |
| D | ctucanfd-driver.rst | 20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board
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| /Documentation/networking/ |
| D | ip-sysctl.rst | 743 based on 5% of SRTT, capped by this sysctl, in nano seconds.
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