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/Documentation/devicetree/bindings/display/panel/
Ddisplay-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
12 - Sam Ravnborg <sam@ravnborg.org>
17 The display-timings node makes it possible to specify the timings
18 and to specify the timing that is native for the display.
22 const: display-timings
[all …]
Dpanel-dsi-cm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-dsi-cm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DSI command mode panels
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
11 - Sebastian Reichel <sre@kernel.org>
15 are usually driven in command mode. If no backlight is
17 panel is assumed to have native backlight support.
23 - $ref: panel-common.yaml#
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Dnovatek,nt35950.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Novatek NT35950-based display panels
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels,
14 with Static RAM for content retention in command mode and also supports
15 video mode with VESA Frame Buffer Compression or Display Stream Compression
17 This DDIC is also capable of upscaling an input image to the panel's native
22 - $ref: panel-common-dual.yaml#
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/Documentation/devicetree/bindings/
Dcommon-properties.txt5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
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/Documentation/devicetree/bindings/regmap/
Dregmap.txt5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
/Documentation/ABI/testing/
Dsysfs-driver-hid-logitech-lg4ff4 Contact: Michal Malý <madcatxster@devoid-pointer.net>
12 Contact: Michal Malý <madcatxster@devoid-pointer.net>
14 mode is listed as follows:
16 Tag: Mode Name
18 Currently active mode is marked with an asterisk. List also
19 contains an abstract item "native" which always denotes the
20 native mode of the wheel. Echoing the mode tag switches the
21 wheel into the corresponding mode. Depending on the exact model
23 If a wheel cannot be switched into the desired mode, -EINVAL
26 This entry is not created for devices that have only one mode.
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/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
24 5.2 Native absolute mode 6 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
30 6.2 Native absolute mode 6 byte packet format
35 7.2 Native absolute mode 6 byte packet format
41 8.2 Native relative mode 6 byte packet format
82 in relative mode and not in absolute mode. As the Linux Elantech touchpad
83 driver always puts the hardware into absolute mode not all information
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/Documentation/devicetree/bindings/display/tilcdc/
Dpanel.txt1 Device-Tree bindings for tilcdc DRM generic panel output driver
4 - compatible: value should be "ti,tilcdc,panel".
5 - panel-info: configuration info to configure LCDC correctly for the panel
6 - ac-bias: AC Bias Pin Frequency
7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
8 - dma-burst-sz: DMA burst size
9 - bpp: Bits per pixel
10 - fdd: FIFO DMA Request Delay
11 - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
12 - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
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/Documentation/devicetree/bindings/memory-controllers/
Dintel,ixp4xx-expansion-bus-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
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/Documentation/devicetree/bindings/powerpc/4xx/
Dcpm.txt4 - compatible : compatible list, currently only "ibm,cpm"
5 - dcr-access-method : "native"
6 - dcr-reg : < DCR register range >
9 - er-offset : All 4xx SoCs with a CPM controller have
15 er-offset = <1>.
16 - unused-units : specifier consist of one cell. For each
20 - idle-doze : specifier consist of one cell. For each
24 - standby : specifier consist of one cell. For each
28 - suspend : specifier consist of one cell. For each
39 refresh mode and any additional power
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/Documentation/devicetree/bindings/spi/
Drenesas,sh-msiof.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: spi-controller.yaml#
18 - items:
19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5
20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible
22 - items:
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/Documentation/devicetree/bindings/pci/
Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
26 space, Port Logic Registers (PL), Shadow Config-space Registers,
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Dsnps,dw-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
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/Documentation/devicetree/bindings/display/
Dwm,wm8505-fb.txt2 -----------------------------------------------------
5 - compatible : "wm,wm8505-fb"
6 - reg : Should contain 1 register ranges(address and length)
7 - bits-per-pixel : bit depth of framebuffer (16 or 32)
10 - display-timings: see display-timing.txt for information
15 compatible = "wm,wm8505-fb";
17 bits-per-pixel = <16>;
19 display-timings {
20 native-mode = <&timing0>;
22 clock-frequency = <0>; /* unused but required */
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Dvia,vt8500-fb.txt2 -----------------------------------------------------
5 - compatible : "via,vt8500-fb"
6 - reg : Should contain 1 register ranges(address and length)
7 - interrupts : framebuffer controller interrupt
8 - bits-per-pixel : bit depth of framebuffer (16 or 32)
11 - display-timings: see display-timing.txt for information
16 compatible = "via,vt8500-fb";
19 bits-per-pixel = <16>;
21 display-timings {
22 native-mode = <&timing0>;
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Dcirrus,clps711x-fb.txt4 - compatible: Shall contain "cirrus,ep7209-fb".
5 - reg : Physical base address and length of the controller's registers +
7 - clocks : phandle + clock specifier pair of the FB reference clock.
8 - display : phandle to a display node as described in
9 Documentation/devicetree/bindings/display/panel/display-timing.txt.
11 - bits-per-pixel: Bits per pixel.
12 - ac-prescale : LCD AC bias frequency. This frequency is the required
14 - cmap-invert : Invert the color levels (Optional).
17 - lcd-supply: Regulator for LCD supply voltage.
21 compatible = "cirrus,ep7312-fb", "cirrus,ep7209-fb";
[all …]
Datmel,lcdc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Dharma Balasubiramani <dharma.b@microchip.com>
17 interface and a look-up table to allow palletized display configurations. The
26 - required: [ 'atmel,dmacon' ]
27 - required: [ 'atmel,lcdcon2' ]
28 - required: [ 'atmel,guard-time' ]
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/Documentation/fb/
Dsisfb.rst8 - SiS 300 series: SiS 300/305, 540, 630(S), 730(S)
9 - SiS 315 series: SiS 315/H/PRO, 55x, (M)65x, 740, (M)661(F/M)X, (M)741(GX)
10 - SiS 330 series: SiS 330 ("Xabre"), (M)760
16 sisfb is eg. useful if you want a high-resolution text console. Besides that,
46 append="video=sisfb:mode:1024x768x16,mem:12288,rate:75"
50 modprobe sisfb mode=1024x768x16 rate=75 mem=12288
54 the parameter format is video=sisfb:mode:none or video=sisfb:mode:1024x768x16
55 (or whatever mode you want to use, alternatively using any other format
56 described above or the vesa keyword instead of mode). If compiled as a module,
57 the parameter format reads mode=none or mode=1024x768x16 (or whatever mode you
[all …]
Duvesafb.rst2 uvesafb - A Generic Driver for VBE2+ compliant video cards
6 ---------------
30 --------------------------
36 - Lack of any type of acceleration.
37 - A strict and limited set of supported video modes. Often the native
40 video mode you want to use. This can be especially painful with
41 widescreen panels, where native video modes don't have the 4:3 aspect
42 ratio, which is what most BIOS-es are limited to.
43 - Adjusting the refresh rate is only possible with a VBE 3.0 compliant
44 Video BIOS. Note that many nVidia Video BIOS-es claim to be VBE 3.0
[all …]
Dtridentfb.rst40 video=tridentfb:800x600-16@75,noaccel
50 center for flat panels and resolutions smaller than native size center the
63 at the bottom this might help by not letting change to that mode
70 mode a mode name like 800x600-8@75 as described in
/Documentation/devicetree/bindings/sound/
Dfsl,esai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
11 - Frank Li <Frank.Li@nxp.com>
14 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
22 - fsl,imx35-esai
23 - fsl,imx6ull-esai
24 - fsl,imx8qm-esai
25 - fsl,vf610-esai
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/Documentation/devicetree/bindings/mtd/
Dcadence-nand-controller.txt4 - compatible : "cdns,hp-nfc"
5 - reg : Contains two entries, each of which is a tuple consisting of a
9 - reg-names: should contain "reg" and "sdma"
10 - #address-cells: should be 1. The cell encodes the chip select connection.
11 - #size-cells : should be 0.
12 - interrupts : The interrupt number.
13 - clocks: phandle of the controller core clock (nf_clk).
16 - dmas: shall reference DMA channel associated to the NAND controller
17 - cdns,board-delay-ps : Estimated Board delay. The value includes the total
19 associated with data read capture. The example formula for SDR mode is
[all …]
/Documentation/leds/
Dleds-class-flash.rst5 Some LED devices provide two modes - torch and flash. In the LED subsystem
6 those modes are supported by LED class (see Documentation/leds/leds-class.rst)
7 and LED Flash class respectively. The torch mode related features are enabled
16 (see Documentation/ABI/testing/sysfs-class-led-flash)
18 - flash_brightness
19 - max_flash_brightness
20 - flash_timeout
21 - max_flash_timeout
22 - flash_strobe
23 - flash_fault
[all …]
/Documentation/infiniband/
Dipoib.rst7 working group. It is a "native" implementation in the sense of
37 connected. The mode is set and read through an interface's
38 /sys/class/net/<intf name>/mode file.
40 In datagram mode, the IB UD (Unreliable Datagram) transport is used
43 fabric with a 2K MTU, the IPoIB MTU will be 2048 - 4 = 2044 bytes.
45 In connected mode, the IB RC (Reliable Connected) transport is used.
46 Connected mode takes advantage of the connected nature of the IB
52 In connected mode, the interface's UD QP is still used for multicast
53 and communication with peers that don't support connected mode. In
68 Stateless offloads are supported only in datagram mode.
[all …]
/Documentation/arch/arm/
Dkernel_user_helpers.rst2 Kernel-provided User Helpers
8 native feature and/or instructions in many ARM CPUs. The idea is for this
9 code to be executed directly in user mode for best efficiency but which is
27 processor that has the necessary native support, but only if resulting
29 usage of similar native instructions for other things. In other words
43 --------------------
77 -------------
114 - Valid only if __kuser_helper_version >= 1 (from kernel version 2.6.12).
117 -------------
134 r0 = success code (zero or non-zero)
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