Searched +full:no +full:- +full:idle (Results 1 – 25 of 157) sorted by relevance
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| /Documentation/scheduler/ |
| D | sched-stats.rst | 16 12 which was in the kernel from 2.6.13-2.6.19 (version 13 never saw a kernel
17 release). Some counters make more sense to be per-runqueue; other to be
18 per-domain. Note that domains (and their associated information) will only
23 domain. Domains have no particular names in this implementation, but
27 are no architectures which need more than three domain levels. The first
38 Note that any such script will necessarily be version-specific, as the main
43 --------------
55 4) # of times schedule() left the processor idle
71 -----------------
73 CONFIG_SMP is not defined, *no* domains are utilized and these lines
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| /Documentation/timers/ |
| D | no_hz.rst | 2 NO_HZ: Reducing Scheduling-Clock Ticks
7 reduce the number of scheduling-clock interrupts, thereby improving energy
9 some types of computationally intensive high-performance computing (HPC)
10 applications and for real-time applications.
12 There are three main ways of managing scheduling-clock interrupts
13 (also known as "scheduling-clock ticks" or simply "ticks"):
15 1. Never omit scheduling-clock ticks (CONFIG_HZ_PERIODIC=y or
16 CONFIG_NO_HZ=n for older kernels). You normally will -not-
19 2. Omit scheduling-clock ticks on idle CPUs (CONFIG_NO_HZ_IDLE=y or
23 3. Omit scheduling-clock ticks on CPUs that are either idle or that
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| /Documentation/devicetree/bindings/power/ |
| D | domain-idle-state.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PM Domain Idle States
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 A domain idle state node represents the state parameters that will be used to
14 select the state when there are no active components in the PM domain.
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
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| /Documentation/driver-api/nvdimm/ |
| D | firmware-activate.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 involves a reboot because it has implications for in-flight memory
21 attribute that shows the state of the firmware activation as one of 'idle',
24 - idle:
25 No devices are set / armed to activate firmware
27 - armed:
30 - busy:
32 back to idle and completing an activation cycle.
34 - overflow:
46 'ndbusX/firmware/activate' property will be elided completely if no
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
22 | +---+ +------+ | child bus A, on first set of pins
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| D | i2c-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
15 +-----+ +-----+
17 +------------+ +-----+ +-----+
19 | | /--------+--------+
20 | +------+ | +------+ child bus A, on GPIO value set to 0
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| D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
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| /Documentation/admin-guide/pm/ |
| D | intel_idle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 ``intel_idle`` CPU Idle Time Management Driver
17 :doc:`CPU idle time management subsystem <cpuidle>` in the Linux kernel
18 (``CPUIdle``). It is the default CPU idle time management driver for the
24 Documentation/admin-guide/pm/cpuidle.rst if you have not done that yet.]
27 logical CPU executing it is idle and so it may be possible to put some of the
28 processor's functional blocks into low-power states. That instruction takes two
38 only way to pass early-configuration-time parameters to it is via the kernel
42 .. _intel-idle-enumeration-of-states:
44 Enumeration of Idle States
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| D | cpuidle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 CPU Idle Time Management
21 memory or executed. Those states are the *idle* states of the processor.
23 Since part of the processor hardware is not used in idle states, entering them
27 CPU idle time management is an energy-efficiency feature concerned about using
28 the idle states of processors for this purpose.
31 ------------
33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
37 software as individual single-core processors. In other words, a CPU is an
44 enter an idle state, that applies to the processor as a whole.
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| /Documentation/devicetree/bindings/mux/ |
| D | adi,adgs1408.txt | 4 - compatible : Should be one of
7 * Standard mux-controller bindings as described in mux-controller.yaml
10 - gpio-controller : if present, #gpio-cells is required.
11 - #gpio-cells : should be <2>
12 - First cell is the GPO line number, i.e. 0 to 3
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, the state that the mux controller will have
19 when idle. The special state MUX_IDLE_AS_IS is the default and
29 * Mux state set to idle as is (no idle-state declared)
32 mux: mux-controller@0 {
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| /Documentation/admin-guide/thermal/ |
| D | intel_powerclamp.rst | 6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
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| /Documentation/driver-api/pm/ |
| D | cpuidle.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 CPU Idle Time Management
13 CPU Idle Time Management Subsystem
18 cores) is idle after an interrupt or equivalent wakeup event, which means that
19 there are no tasks to run on it except for the special "idle" task associated
21 belongs to. That can be done by making the idle logical CPU stop fetching
23 depended on by it into an idle state in which they will draw less power.
25 However, there may be multiple different idle states that can be used in such a
28 particular idle state. That is the role of the CPU idle time management
35 units: *governors* responsible for selecting idle states to ask the processor
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| /Documentation/driver-api/thermal/ |
| D | cpu-idle-cooling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 CPU Idle Cooling
8 ----------
26 budget lower than the requested one and under-utilize the CPU, thus
27 losing performance. In other words, one OPP under-utilizes the CPU
33 ----------
37 decrease. Acting on the idle state duration or the idle cycle
47 At a specific OPP, we can assume that injecting idle cycle on all CPUs
49 idle state target residency, we lead to dropping the static and the
51 this state). So the sustainable power with idle cycles has a linear
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| /Documentation/devicetree/bindings/bus/ |
| D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
22 module clocks, idle modes and interconnect level resets.
31 pattern: "^target-module(@[0-9a-f]+)?$"
35 - items:
36 - enum:
37 - ti,sysc-omap2
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| /Documentation/devicetree/bindings/arm/omap/ |
| D | omap.txt | 11 to move data from hwmod to device-tree representation.
15 - compatible: Every devices present in OMAP SoC should be in the
17 - ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP
22 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
24 - ti,no-reset-on-init: When present, the module should not be reset at init
25 - ti,no-idle-on-init: When present, the module should not be idled at init
26 - ti,no-idle: When present, the module is never allowed to idle.
31 compatible = "ti,omap4-spinlock";
37 - General Purpose devices
39 - High Security devices
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| /Documentation/core-api/ |
| D | workqueue.rst | 24 there is no work item left on the workqueue the worker becomes idle.
33 thread system-wide. A single MT wq needed to keep around the same
50 limitation that no two polling PIOs can progress at the same time. As
60 * Use per-CPU unified worker pools shared by all wq to provide
83 the functions off of the queue, one after the other. If no work is queued,
84 the worker threads become idle. These worker threads are managed in
85 worker-pools.
87 The cmwq design differentiates between the user-facing workqueues that
89 which manages worker-pools and processes the queued work items.
91 There are two worker-pools, one for normal work items and the other
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| /Documentation/admin-guide/blockdev/ |
| D | zram.rst | 2 zram: Compressed RAM-based block devices
8 The zram module creates RAM-based block devices named /dev/zram<id>
20 There are several ways to configure and manage zram device(-s):
23 b) using zramctl utility, provided by util-linux (util-linux@vger.kernel.org).
28 In order to get a better idea about zramctl please consult util-linux
29 documentation, zramctl man-page or `zramctl --help`. Please be informed
30 that zram maintainers do not develop/maintain util-linux or zramctl, should
31 you have any questions please contact util-linux@vger.kernel.org
45 -EBUSY an attempt to modify an attribute that cannot be changed once
47 -ENOMEM zram was not able to allocate enough memory to fulfil your
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| /Documentation/driver-api/usb/ |
| D | power-management.rst | 1 .. _usb-power-management:
7 :Date: Last-updated: February 2014
11 ---------
14 * When is a USB device idle?
17 * Changing the default idle-delay time
31 -------------------------
35 component is ``suspended`` it is in a nonfunctional low-power state; it
37 ``resumed`` (returned to a functional full-power state) when the kernel
67 ----------------------
84 When is a USB device idle?
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| /Documentation/ABI/testing/ |
| D | sysfs-block-zram | 5 The disksize file is read-write and specifies the disk size
14 The initstate file is read-only and shows the initialization
21 The reset file is write-only and allows resetting the
29 The max_comp_streams file is read-write and specifies the
37 The comp_algorithm file is read-write and lets to show
45 The mem_used_max file is write-only and is used to reset
48 "0". Otherwise, you could see -EINVAL.
55 The mem_limit file is write-only and specifies the maximum
58 the limit. No limit is the initial state. Unit: bytes
64 The compact file is write-only and trigger compaction for
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| /Documentation/RCU/Design/Expedited-Grace-Periods/ |
| D | Expedited-Grace-Periods.rst | 13 There are two flavors of RCU (RCU-preempt and RCU-sched), with an earlier
14 third RCU-bh flavor having been implemented in terms of the other two.
38 RCU-preempt Expedited Grace Periods
41 ``CONFIG_PREEMPTION=y`` kernels implement RCU-preempt.
42 The overall flow of the handling of a given CPU by an RCU-preempt
45 .. kernel-figure:: ExpRCUFlow.svg
51 If a given CPU is offline or idle, ``synchronize_rcu_expedited()``
52 will ignore it because idle and offline CPUs are already residing
59 can check to see if the CPU is currently running in an RCU read-side
63 invocation will provide the needed quiescent-state report.
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| /Documentation/userspace-api/media/v4l/ |
| D | ext-ctrls-image-source.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _image-source-controls:
9 The Image Source control class is intended for low-level control of
15 .. _image-source-control-id:
24 Vertical blanking. The idle period after every frame during which no
28 same sub-device.
31 Horizontal blanking. The idle period after every line of image data
32 during which no image data is produced. The unit of horizontal
59 non-sensitive.
64 .. flat-table:: struct v4l2_area
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 3 EMIF - External Memory Interface - is an SDRAM controller used in
11 - compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
14 "ti,emif-am3352"
15 "ti,emif-am4372"
16 "ti,emif-dra7xx"
17 "ti,emif-keystone"
19 - phy-type : <u32> indicating the DDR phy type. Following are the
24 - device-handle : phandle to a "lpddr2" node representing the memory part
26 - ti,hwmods : For TI hwmods processing and omap device creation
29 - interrupts : interrupt used by the controller
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| /Documentation/arch/x86/ |
| D | mds.rst | 7 --------
12 - Microarchitectural Store Buffer Data Sampling (MSBDS) (CVE-2018-12126)
13 - Microarchitectural Fill Buffer Data Sampling (MFBDS) (CVE-2018-12130)
14 - Microarchitectural Load Port Data Sampling (MLPDS) (CVE-2018-12127)
15 - Microarchitectural Data Sampling Uncacheable Memory (MDSUM) (CVE-2019-11091)
18 dependent load (store-to-load forwarding) as an optimization. The forward
21 buffers are partitioned between Hyper-Threads so cross thread forwarding is
32 Hyper-Threads so cross thread leakage is possible.
39 exploited eventually. Load ports are shared between Hyper-Threads so cross
48 --------------------
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| /Documentation/trace/ |
| D | ftrace.rst | 2 ftrace - Function Tracer
13 - Written for: 2.6.28-rc2
14 - Updated for: 3.10
15 - Updated for: 4.13 - Copyright 2017 VMware Inc. Steven Rostedt
16 - Converted to rst format - Changbin Du <changbin.du@intel.com>
19 ------------
24 performance issues that take place outside of user-space.
41 ----------------------
43 See Documentation/trace/ftrace-design.rst for details for arch porters and such.
47 ---------------
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| /Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
36 - At the time this documentation was written, the debug driver mainly relies on
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