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/Documentation/devicetree/bindings/fsi/
Dfsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/fsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eddie James <eajames@linux.ibm.com>
18 "#address-cells":
21 "#size-cells":
24 '#interrupt-cells':
27 bus-frequency:
31 interrupt-controller: true
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Dfsi.txt4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
32 fsi-slave-engine@<addr> {
39 Note that since the bus is probe-able, some (or all) of the topology may
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/Documentation/arch/x86/x86_64/
Dboot-options.rst1 .. SPDX-License-Identifier: GPL-2.0
27 This option will be useful if you have no interest in any
39 Do not opt-in to Local MCE delivery. Use legacy method
43 Disabled by default on AMD Fam10h and older because some BIOS
47 in a reboot. On Intel systems it is enabled by default.
52 Sets the time in us to wait for other CPUs on machine checks. 0
55 Don't overwrite the bios-set CMCI threshold. This boot option
62 Force-enable recoverable machine check code paths
73 Use IO-APIC. Default
76 Don't use the IO-APIC.
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/Documentation/driver-api/
Dmtdnand.rst10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
61 NULL on entry to nand_scan() then the pointer is set to the default
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
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/Documentation/scsi/
Dsym53c8xx_2.rst1 .. SPDX-License-Identifier: GPL-2.0
4 SYM-2 driver
11 95170 DEUIL LA BARRE - FRANCE
15 2004-10-09
67 This driver supports the whole SYM53C8XX family of PCI-SCSI controllers.
68 It also support the subset of LSI53C10XX PCI-SCSI controllers that are based
69 on the SYM53C8XX SCRIPTS language.
72 with the FreeBSD SYM-2 driver. The 'glue' that allows this driver to work
74 Other drivers files are intended not to depend on the Operating System
75 on which the driver is used.
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Dncr53c8xx.rst1 .. SPDX-License-Identifier: GPL-2.0
11 95170 DEUIL LA BARRE - FRANCE
64 10.4 PCI configuration fix-up boot option
81 16.1 Synchronous timings for 53C875 and 53C860 Ultra-SCSI controllers
82 16.2 Synchronous timings for fast SCSI-2 53C8XX controllers
97 - Gerard Roudier <groudier@free.fr>
101 - Wolfgang Stanglmeier <wolf@cologne.de>
102 - Stefan Esser <se@mi.Uni-Koeln.de>
106 - ncr53c8xx generic driver that supports all the SYM53C8XX family including
109 - sym53c8xx enhanced driver (a.k.a. 896 drivers) that drops support of oldest
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DChangeLog.lpfc2 * Please read the associated RELEASE-NOTES file !!!
8 * Fixed build warning for 2.6.12-rc2 kernels: mempool_alloc now
17 to luns on nodes in NPR or other relevant states (PLOGI,
18 PRLI...) are errored back and scan() terminates.
19 * Removed FC_TRANSPORT_PATCHESxxx defines. They're in 2.6.12-rc1.
26 * Added PCI ID for LP10000-S.
31 * Zero-out response sense length in lpfc_scsi_prep_cmnd to prevent
33 - was causing spurious 0710 messages.
55 - stop using volatile. if you need special ordering use memory
57 - switch lpfc_sli_pcimem_bcopy to take void * arguments.
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/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst11 - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
12 - Modified by Paul Jackson <pj@sgi.com>
13 - Modified by Christoph Lameter <cl@linux.com>
14 - Modified by Paul Menage <menage@google.com>
15 - Modified by Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
41 ----------------------
45 an on-line node that contains memory.
51 job placement on large systems.
54 Documentation/admin-guide/cgroup-v1/cgroups.rst.
61 schedule a task on a CPU that is not allowed in its cpus_allowed
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/Documentation/admin-guide/
Dkernel-parameters.txt14 Format: { force | on | off | strict | noirq | rsdt |
16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
25 default _serial_ console on ARM64
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/Documentation/networking/device_drivers/ethernet/stmicro/
Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
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/Documentation/RCU/Design/Memory-Ordering/
DTree-RCU-Memory-Ordering.rst2 A Tour Through TREE_RCU's Grace-Period Memory Ordering
13 grace-period memory ordering guarantee is provided.
18 RCU grace periods provide extremely strong memory-ordering guarantees
19 for non-idle non-offline code.
22 period that are within RCU read-side critical sections.
25 of that grace period that are within RCU read-side critical sections.
27 Note well that RCU-sched read-side critical sections include any region
30 an extremely small region of preemption-disabled code, one can think of
31 ``synchronize_rcu()`` as ``smp_mb()`` on steroids.
37 a linked RCU-protected data structure, and phase two frees that element.
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