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/Documentation/devicetree/bindings/sound/
Dxlnx,i2s.txt1 Device-Tree bindings for Xilinx I2S PL block
6 - compatible: "xlnx,i2s-transmitter-1.0" for playback and
7 "xlnx,i2s-receiver-1.0" for capture
10 - reg: Base address and size of the IP core instance.
11 - xlnx,dwidth: sample data width. Can be any of 16, 24.
12 - xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4.
13 supported channels = 2 * xlnx,num-channels
18 compatible = "xlnx,i2s-receiver-1.0";
21 xlnx,num-channels = <1>;
24 compatible = "xlnx,i2s-transmitter-1.0";
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Ddmic-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/dmic-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
13 - $ref: dai-common.yaml#
17 const: dmic-codec
19 '#sound-dai-cells':
22 dmicen-gpios:
26 num-channels:
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Dtdm-slot.txt6 dai-tdm-slot-num : Number of slots in use.
7 dai-tdm-slot-width : Width in bits for each slot.
8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
12 dai-tdm-slot-num = <2>;
13 dai-tdm-slot-width = <8>;
14 dai-tdm-slot-tx-mask = <0 1>;
15 dai-tdm-slot-rx-mask = <1 0>;
18 to specify an explicit mapping of the channels and the slots. If it's absent
27 number presents bit-0 (LSB), second presents bit-1, etc. Any non zero
Dfsl,qmc-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,qmc-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
14 Controller) channels to transfer the audio data.
16 if only one QMC channel is used by the DAI or it is working in non-interleaved
17 mode if several QMC channels are used by the DAI.
20 - $ref: dai-common.yaml#
24 const: fsl,qmc-audio
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Ddavinci-mcasp-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-choudhary@ti.com>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
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Dsimple-card.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
18 bitclock-master:
19 description: Indicates dai-link bit clock master
22 frame-inversion:
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Dinfineon,peb2466.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
20 'dai-tdm-tdm-slot-with' must be set to 8.
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/Documentation/devicetree/bindings/pwm/
Dpwm-st.txt2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
16 - clock-names: Valid entries are "pwm" and/or "capture".
17 - clocks: phandle of the clock used by the PWM module.
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/Documentation/devicetree/bindings/crypto/
Dfsl-sec2.txt1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
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/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
16 and receive channels.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
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/Documentation/devicetree/bindings/dma/
Dqcom,bam-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <andersson@kernel.org>
14 - $ref: dma-controller.yaml#
19 - enum:
21 - qcom,bam-v1.3.0
23 - qcom,bam-v1.4.0
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/Documentation/devicetree/bindings/leds/backlight/
Dkinetic,ktz8866.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jianhua Lu <lujianhua000@gmail.com>
13 The Kinetic Technologies KTZ8866 is a high efficiency 6-channels-current-sinks
15 https://www.kinet-ic.com/ktz8866/
18 - $ref: common.yaml#
27 vddpos-supply:
30 vddneg-supply:
33 enable-gpios:
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/Documentation/devicetree/bindings/mailbox/
Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
59 phandle to the intended sub-mailbox child node to be used for communication.
60 The equivalent "mbox-names" property value can be used to give a name to the
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Darm,mhu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jassi Brar <jaswinder.singh@linaro.org>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
14 independent channels/links to communicate with remote processor(s). MHU links
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
28 interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote
37 - arm,mhu
38 - arm,mhu-doorbell
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/Documentation/devicetree/bindings/usb/
Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
25 reg-names: phy
31 - compatible: ti,musb-am33xx
32 - reg: offset and length of "USB Controller Registers", and offset and
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/Documentation/devicetree/bindings/media/
Dstih407-c8sectpfe.txt11 Currently 7 TS input (tsin) channels are supported on the stih407 family SoC.
14 - compatible : Should be "stih407-c8sectpfe"
16 - reg : Address and length of register sets for each device in
17 "reg-names"
19 - reg-names : The names of the register addresses corresponding to the
21 - c8sectpfe: c8sectpfe registers
22 - c8sectpfe-ram: c8sectpfe internal sram
24 - clocks : phandle list of c8sectpfe clocks
25 - clock-names : should be "c8sectpfe"
26 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
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/Documentation/devicetree/bindings/firmware/
Darm,scpi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
33 - const: arm,scpi # SCPI v1.0 and above
34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0
35 - items:
36 - enum:
37 - amlogic,meson-gxbb-scpi
38 - const: arm,scpi-pre-1.0
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/Documentation/devicetree/bindings/net/
Dlantiq,pef2256.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
20 - const: lantiq,pef2256
27 - description: Master Clock
28 - description: System Clock Receive
29 - description: System Clock Transmit
31 clock-names:
33 - const: mclk
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Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
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/Documentation/driver-api/
Dvme.rst5 -------------------
24 .. code-block:: c
30 if (vdev->id.num >= USER_BUS_MAX)
39 Here, the 'num' field refers to the sequential device ID for this specific
41 dev->bridge->num.
49 -------------------
53 succeeds, a non-zero value should be returned. A zero return value indicates
61 and/or dma channels (:c:func:`vme_dma_request`). Rather than allowing the device
73 transfers to be provided in the route attributes. This is typically VME-to-MEM
74 and/or MEM-to-VME, though some hardware can support VME-to-VME and MEM-to-MEM
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/Documentation/devicetree/bindings/input/touchscreen/
Dazoteq,iqs7211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS7210A, IQS7211A and IQS7211E trackpad and touchscreen control-
14 lers employ projected-capacitance sensing and can track two contacts.
21 - azoteq,iqs7210a
22 - azoteq,iqs7211a
23 - azoteq,iqs7211e
28 irq-gpios:
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/Documentation/devicetree/bindings/pci/
Dsnps,dw-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Root Port controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie
23 - compatible
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/Documentation/devicetree/bindings/input/
Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
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/Documentation/netlink/specs/
Dethtool.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
10 -
11 name: udp-tunnel-type
12 enum-name:
14 entries: [ vxlan, geneve, vxlan-gpe ]
15 -
19 -
20 name: header-flags
22 entries: [ compact-bitsets, omit-reply, stats ]
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/Documentation/staging/
Dremoteproc.rst10 of operating system, whether it's Linux or any other flavor of real-time OS.
12 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
13 In a typical configuration, the dual cortex-A9 is running Linux in a SMP
22 platform-specific remoteproc drivers only need to provide a few low-level
24 (for more information about the virtio-based rpmsg bus and its drivers,
118 name of this remote processor, platform-specific ops handlers,
154 This is called by the platform-specific rproc implementation, whenever
180 Returns 0 on success and -EINVAL if @rproc isn't valid.
190 non-remoteproc driver. This function can be called from atomic/interrupt
196 These callbacks should be provided by platform-specific remoteproc
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