Searched +full:on +full:- +full:die (Results 1 – 25 of 49) sorted by relevance
12
| /Documentation/ABI/testing/ |
| D | sysfs-devices-mapping | 6 each dieX file (where X is die number) holds "Segment:Root Bus"
9 For example, on 4-die Xeon platform with up to 6 IIO stacks per
10 die and, therefore, 6 IIO PMON blocks per die, the mapping of
13 $ ls /sys/devices/uncore_iio_0/die*
14 -r--r--r-- /sys/devices/uncore_iio_0/die0
15 -r--r--r-- /sys/devices/uncore_iio_0/die1
16 -r--r--r-- /sys/devices/uncore_iio_0/die2
17 -r--r--r-- /sys/devices/uncore_iio_0/die3
19 $ tail /sys/devices/uncore_iio_0/die*
31 IIO PMU 0 on die 0 belongs to PCI RP on bus 0x00, domain 0x0000
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| D | sysfs-devices-platform-kunpeng_hccs | 9 contains read-only attributes exposing some summarization
11 The X in 'chipX' indicates the Xth chip on platform.
16 all_linked: (RO) if all enabled ports on this chip are
18 linked_full_lane: (RO) if all linked ports on this chip are full
20 crc_err_cnt: (RO) total CRC err count for all ports on this
32 contains read-only attributes exposing some summarization
33 information of all HCCS ports under a specified die.
34 The Y in 'dieY' indicates the hardware id of the die on chip who
40 all_linked: (RO) if all enabled ports on this die are
42 linked_full_lane: (RO) if all linked ports on this die are full
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| /Documentation/hwmon/ |
| D | xgene-hwmon.rst | 1 Kernel driver xgene-hwmon
6 * APM X-Gene SoC
9 -----------
12 APM X-Gene SoC using the mailbox communication interface.
19 - SoC on-die temperature in milli-degree C
20 - Alarm when high/over temperature occurs
23 - CPU power in uW
24 - IO power in uW
26 sysfs-Interface
27 ---------------
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| D | sy7636a-hwmon.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Kernel driver sy7636a-hwmon
12 -----------
20 - SoC on-die temperature in milli-degree C
22 sysfs-Interface
23 ---------------
26 - SoC on-die temperature (milli-degree C)
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| D | tps23861.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
16 -----------
23 TPS23861 offers three modes of operation: Auto, Semi-Auto and Manual.
29 -------------
32 in[0-3]_input Voltage on ports [1-4]
33 in[0-3]_label "Port[1-4]"
36 temp1_input IC die temperature
37 temp1_label "Die"
38 curr[1-4]_input Current on ports [1-4]
39 in[1-4]_label "Port[1-4]"
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| D | k10temp.rst | 8 Socket F: Quad-Core/Six-Core/Embedded Opteron (but see below)
10 Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below)
12 Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
20 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
22 * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
24 * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri",
53 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors:
69 Revision Guide for AMD Family 14h Models 00h-0Fh Processors:
88 -----------
93 All these processors have a sensor, but on those for Socket F or AM2+,
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| D | peci-cputemp.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
3 Kernel driver peci-cputemp
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
17 Intel Xeon E5-16xx v4 family
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| D | sparx5-temp.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
3 Microchip SparX-5 SoC
10 Prefix: 'sparx5-temp'
12 Addresses scanned: -
19 -----------
21 The Sparx5 SoC contains a temperature sensor based on the MR74060
24 The sensor has a range of -40°C to +125°C and an accuracy of +/-5°C.
27 -------------
32 temp1_input Die temperature (in millidegree Celsius.)
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| D | intel-m10-bmc-hwmon.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 Kernel driver intel-m10-bmc-hwmon
10 Prefix: 'n3000bmc-hwmon'
16 -----------
22 sensor data of different components on the board. The BMC firmware is
34 ----------------
38 - Intel MAX 10 BMC for Intel PAC N3000:
47 temp2_label "FPGA Die Temperature"
78 All the attributes are read-only.
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| /Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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| D | intel_uncore_frequency_scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
16 on the workload characteristics. To optimize the total power and improve overall
30 ---------------
35 There is one directory for each package and die combination as the scope of
36 uncore scaling control is per die in multiple die/package SoCs or per
37 package for single die per package SoCs. The name represents the
39 die 0.
45 This is a read-only attribute. If users adjust max_freq_khz,
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| /Documentation/driver-api/ |
| D | hsi.rst | 5 ---------------
8 that is optimized for die-level interconnect between an Application Processor
18 commonly prefixed by AC for signals going from the application die to the
19 cellular die and CA for signals going the other way around.
23 +------------+ +---------------+
25 | Die | | Die |
26 | | - - - - - - CAWAKE - - - - - - >| |
27 | T|------------ CADATA ------------>|R |
28 | X|------------ CAFLAG ------------>|X |
29 | |<----------- ACREADY ------------| |
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| /Documentation/locking/ |
| D | ww-mutex-design.rst | 2 Wound/Wait Deadlock-Proof Mutex Design
5 Please read mutex-design.rst first, as it applies to wait/wound mutexes too.
7 Motivation for WW-Mutexes
8 -------------------------
12 domains (for example VRAM vs system memory), and so on. And with
15 become ready. If you think about this in terms of waiting on a buffer
22 buffer(s) into VRAM before the GPU operates on the buffer(s), which
37 and the deadlock handling approach is called Wait-Die. The name is based on
41 and dies. Hence Wait-Die.
42 There is also another algorithm called Wound-Wait:
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| /Documentation/admin-guide/perf/ |
| D | alibaba_pmu.rst | 2 Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)
5 The Yitian 710, custom-built by Alibaba Group's chip development business,
6 T-Head, implements uncore PMU for performance and functional debugging to
9 DDR Sub-System Driveway (DRW) PMU Driver
12 Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel
14 channel is split into two independent sub-channels. The DDR Sub-System Driveway
15 implements separate PMUs for each sub-channel to monitor various performance
20 sub-channels of the same channel in die 0. And the PMU device of die 1 is
23 Each sub-channel has 36 PMU counters in total, which is classified into
26 - Group 0: PMU Cycle Counter. This group has one pair of counters
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| /Documentation/ABI/stable/ |
| D | sysfs-devices-system-cpu | 2 Date: 13-May-2014
6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
9 all per-CPU defaults at the same time.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
13 Date: 13-May-2014
16 Description: Default value for the Data Stream Control Register (DSCR) on
22 on any CPU where it executes (overriding the value described
34 Description: the CPU die ID of cpuX. Typically it is the hardware platform's
54 architecture and platform dependent. it's only used on s390.
60 architecture and platform dependent. it's only used on s390.
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| /Documentation/admin-guide/RAS/ |
| D | address-translation.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 -------
9 Zen-based AMD systems include a Data Fabric that manages the layout of
14 a system physical address for the kernel to action on the memory.
19 Glossary of acronyms used in address translation for Zen-based systems
22 * COD = Cluster-on-Die
|
| /Documentation/admin-guide/nfs/ |
| D | nfs-client.rst | 14 and work is in progress on adding support for minor version 1 of the NFSv4
17 The purpose of this document is to provide information on some of the
71 …530 Section 6\: Filesystem Migration and Replication: https://tools.ietf.org/html/rfc3530#section-6
72 …lementation Guide for Referrals in NFSv4: https://tools.ietf.org/html/draft-ietf-nfsv4-referrals-00
88 - the cache name, "dns_resolve"
89 - the hostname to resolve
92 writes the result into the rpc_pipefs pseudo-file
114 .. code-block:: sh
124 die()
130 [ $# -lt 2 ] && die
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | marvell,odmi-controller.txt | 4 Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller
5 which can be used by on-board peripheral for MSI interrupts.
9 - compatible : The value here should contain:
11 "marvell,ap806-odmi-controller", "marvell,odmi-controller".
13 - interrupt,controller : Identifies the node as an interrupt controller.
15 - msi-controller : Identifies the node as an MSI controller.
17 - marvell,odmi-frames : Number of ODMI frames available. Each frame
20 - reg : List of register definitions, one for each
23 - marvell,spi-base : List of GIC base SPI interrupts, one for each
24 ODMI frame. Those SPI interrupts are 0-based,
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| D | apple,aic2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
13 The Apple Interrupt Controller 2 is a simple interrupt controller present on
18 - Level-triggered hardware IRQs wired to SoC blocks
19 - Single mask bit per IRQ
20 - Automatic masking on event delivery (auto-ack)
21 - Software triggering (ORed with hw line)
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| /Documentation/devicetree/bindings/thermal/ |
| D | nvidia,tegra30-tsensor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra30-tsensor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
16 and voltage of the chip. Sensors are placed across the die to gauge the
19 Generates an interrupt to SW to lower temperature via DVFS on reaching
22 Generates a signal to the CAR to reduce CPU frequency by half on reaching
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| /Documentation/devicetree/bindings/mtd/ |
| D | nand-chip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: mtd.yaml#
18 SPI-NAND devices are concerned by this description.
23 Contains the chip-select IDs.
25 nand-ecc-engine:
27 A phandle on the hardware ECC engine if any. There are
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| /Documentation/admin-guide/kdump/ |
| D | kdump.rst | 2 Documentation for Kdump - The kexec-based Crash Dumping Solution
11 Kdump uses kexec to quickly boot to a dump-capture kernel whenever a
14 the reboot and is accessible to the dump-capture kernel.
17 the memory image to a dump file on the local disk, or across the network
20 Kdump and kexec are currently supported on the x86, x86_64, ppc64,
24 the dump-capture kernel. This ensures that ongoing Direct Memory Access
25 (DMA) from the system kernel does not corrupt the dump-capture kernel.
26 The kexec -p command loads the dump-capture kernel into this reserved
29 On x86 machines, the first 640 KB of physical memory is needed for boot,
35 On PPC64 machines first 32KB of physical memory is needed for booting
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| /Documentation/devicetree/bindings/regulator/ |
| D | maxim,max8973.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
18 - maxim,max8973
19 - maxim,max77621
21 junction-warn-millicelsius:
23 Junction warning temperature threshold in millicelsius. If die
26 Please note that thermal functionality is only supported on MAX77621. The
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| /Documentation/arch/x86/ |
| D | topology.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
14 definitions. Thus, the way to read up on Linux topology on x86 is to start
17 Needless to say, code should use the generic functions - this file is *only*
35 - packages
36 - cores
37 - threads
44 Modern systems may also use the term 'Die' for package.
48 Package-related topology information in the kernel:
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| /Documentation/devicetree/bindings/hwmon/ |
| D | nuvoton,nct7802.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Guenter Roeck <linux@roeck-us.net>
14 The NCT7802Y is a hardware monitor IC which supports one on-die and up to
18 https://www.nuvoton.com/export/resource-files/Nuvoton_NCT7802Y_Datasheet_V12.pdf
25 - nuvoton,nct7802
30 "#address-cells":
33 "#size-cells":
37 "^channel@[0-3]$":
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12