Searched +full:one +full:- +full:shot (Results 1 – 25 of 33) sorted by relevance
12
| /Documentation/leds/ |
| D | ledtrig-transient.rst | 6 a one shot timer. The current support allows for setting two timers, one for
11 gets deactivated. There is no provision for one time activation to implement
15 Without one shot timer interface, user space can still use timer trigger to
20 Transient trigger addresses the need for one shot timer activation. The
56 non-transient state. When driver gets suspended, irrespective of the transient
71 - duration allows setting timer value in msecs. The initial value is 0.
72 - activate allows activating and deactivating the timer specified by
75 - state allows user to specify a transient state to be held for the specified
79 - one shot timer activate mechanism.
90 - one shot timer value. When activate is set, duration value
[all …]
|
| D | ledtrig-oneshot.rst | 2 One-shot LED Trigger
6 no clear trap points to put standard led-on and led-off settings. Using this
16 A one-shot LED only stays in a constant state when there are no events. An
26 Documentation/ABI/testing/sysfs-class-led-trigger-oneshot
28 Example use-case: network devices, initialization::
36 echo 1 > invert # set led as normally-on, turn the led on
40 echo 1 > shot # led starts blinking, ignored if already blinking
44 echo 0 > invert # set led as normally-off, turn the led off
|
| /Documentation/devicetree/bindings/iio/light/ |
| D | upisemi,us5182.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Cameron <jic23@kernel.org>
19 upisemi,glass-coef:
22 glass attenuation factor - compensation factor of resolution 1000
26 upisemi,dark-ths:
27 $ref: /schemas/types.yaml#/definitions/uint16-array
31 16-bit thresholds (adc counts) corresponding to every scale.
33 upisemi,upper-dark-gain:
[all …]
|
| /Documentation/hwmon/ |
| D | tmp108.rst | 19 -----------
21 The Texas Instruments TMP108 implements one temperature sensor. An alert pin
26 The sensor is accurate to 0.75C over the range of -25 to +85 C, and to 1.0
27 degree from -40 to +125 C. Resolution of the sensor is 0.0625 degree. The
28 operating temperature has a minimum of -55 C and a maximum of +150 C.
35 the TMP108 has a one-shot mode where the device is normally shut-down. When a
36 one shot is requested the temperature is read, the result can be retrieved,
40 The driver provides the common sysfs-interface for temperatures (see
41 Documentation/hwmon/sysfs-interface.rst under Temperatures).
|
| D | max31827.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 Addresses scanned: I2C 0x40 - 0x5f
20 Addresses scanned: I2C 0x40 - 0x5f
28 Addresses scanned: I2C 0x40 - 0x5f
34 - Daniel Matyas <daniel.matyas@analog.com>
37 -----------
40 between them is found in the default power-on behaviour of the chips. While the
52 hysteresis value: -40 and -30 degrees for under temperature alarm and +100 and
77 The conversions can be manual with the one-shot functionality and automatic with
83 - 64000 (ms) = 1 conv/64 sec
[all …]
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | ti,ina3221.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean Delvare <jdelvare@suse.com>
11 - Guenter Roeck <linux@roeck-us.net>
20 ti,single-shot:
22 This chip has two power modes: single-shot (chip takes one measurement
25 hardware monitor type device, but the single-shot mode is more power-
26 friendly and useful for battery-powered device which cares power
29 If this property is present, the single-shot mode will be used, instead
[all …]
|
| /Documentation/userspace-api/media/dvb/ |
| D | dmx-set-filter.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
11 ----
16 --------
23 ---------
33 -----------
39 state whether a section should be CRC-checked, whether the filter should
40 be a "one-shot" filter, i.e. if the filtering operation should be
43 :ref:`DMX_START` ioctl call). If a filter was previously set-up, this
47 ------------
51 On error -1 is returned, and the ``errno`` variable is set
[all …]
|
| /Documentation/devicetree/bindings/timer/ |
| D | sprd,sc9860-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/timer/sprd,sc9860-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 The Spreadtrum SC9860 platform provides 3 general-purpose timers.
17 period mode or one-shot mode, and they can be a wakeup source
23 - sprd,sc9860-timer
[all …]
|
| D | nvidia,tegra186-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <treding@nvidia.com>
13 The Tegra timer provides 29-bit timer counters and a 32-bit timestamp
16 programmed to generate one-shot, periodic, or watchdog interrupts.
22 - const: nvidia,tegra186-timer
24 The Tegra186 timer provides ten 29-bit timer counters.
25 - const: nvidia,tegra234-timer
[all …]
|
| D | arm,sp804.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haojian Zhuang <haojian.zhuang@linaro.org>
14 16 or 32 bit operation and capable of running in one-shot, periodic, or
15 free-running mode. The input clock is shared, but can be gated and prescaled
18 There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
27 - arm,sp804
28 - hisilicon,sp804
30 - compatible
[all …]
|
| D | nvidia,tegra-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
27 - if:
31 - items:
[all …]
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | nxp,imx93-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
15 One-Shot and Scan (continuous) conversions. Programmable DMA
18 also has Self-test logic and Software-initiated calibration.
22 const: nxp,imx93-adc
29 - description: WDGnL, watchdog threshold interrupt requests.
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | riscv,cpu-intc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,cpu-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Hart-Level Interrupt Controller (HLIC)
10 RISC-V cores include Control Status Registers (CSRs) which are local to
11 each CPU core (HART in RISC-V terminology) and can be read or written by
16 The RISC-V supervisor ISA manual specifies three interrupt sources that are
19 cores. The timer interrupt comes from an architecturally mandated real-
22 the HLIC, which are routed via the platform-level interrupt controller
[all …]
|
| /Documentation/ABI/testing/ |
| D | sysfs-class-rtc | 4 Contact: linux-rtc@vger.kernel.org
11 Contact: linux-rtc@vger.kernel.org
19 Contact: linux-rtc@vger.kernel.org
21 (RO) RTC-provided date in YYYY-MM-DD format
26 Contact: linux-rtc@vger.kernel.org
34 Contact: linux-rtc@vger.kernel.org
42 Contact: linux-rtc@vger.kernel.org
49 Contact: linux-rtc@vger.kernel.org
57 Contact: linux-rtc@vger.kernel.org
59 (RO) RTC-provided time as the number of seconds since the epoch
[all …]
|
| D | sysfs-ptp | 41 Write integer to re-configure it.
47 This file contains the number of periodic or one shot
88 This directory contains one file for each programmable
110 This write-only file enables or disables external
128 This write-only file enables or disables periodic
139 This write-only file enables or disables delivery of
|
| D | sysfs-bus-counter | 3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
16 MTCLKA-MTCLKB:
20 MTCLKC-MTCLKD:
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
45 Contact: linux-iio@vger.kernel.org
52 Contact: linux-iio@vger.kernel.org
59 Contact: linux-iio@vger.kernel.org
[all …]
|
| /Documentation/filesystems/xfs/ |
| D | xfs-delayed-logging-design.rst | 1 .. SPDX-License-Identifier: GPL-2.0
33 details logged are made up of the changes to in-core structures rather than
34 on-disk structures. Other objects - typically buffers - have their physical
58 reservation they take. These are known as "one shot" and "permanent"
60 commit boundaries, whilst "one shot" transactions are for a single atomic
64 place. This means that permanent transactions can be used for one-shot
65 modifications, but one-shot reservations cannot be used for permanent
68 In the code, a one-shot transaction pattern looks somewhat like this::
97 While this might look similar to a one-shot transaction, there is an important
123 the on-disk journal.
[all …]
|
| /Documentation/trace/coresight/ |
| D | coresight-etm4x-reference.rst | 11 ---------------------------
20 ----
37 ----
47 ----
52 - > 0 : Programs up the hardware with the current values held in the driver
55 - = 0 : disable trace hardware.
60 ----
72 ----
77 When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for trace session. Otherwise -1
86 ----
[all …]
|
| /Documentation/virt/kvm/x86/ |
| D | timekeeping.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
20 One of the most complicated parts of the X86 platform, and specifically,
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
44 One of the first timer devices available is the programmable interrupt timer,
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
59 -------------- ----------------
[all …]
|
| /Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
18 Many LED devices expose more than one current output that can be connected
19 to one or more discrete LED component. Since the arrangement of connections
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
34 LED function. Use one of the LED_FUNCTION_* prefixed definitions
[all …]
|
| /Documentation/input/joydev/ |
| D | joystick.rst | 3 .. _joystick-doc:
14 linux-input@vger.kernel.org
16 send "subscribe linux-input" to majordomo@vger.kernel.org to subscribe to it.
25 ---------
29 usually packaged as ``joystick``, ``input-utils``, ``evtest``, and so on.
35 ------------
48 ln -s input/js0 js0
49 ln -s input/js1 js1
50 ln -s input/js2 js2
51 ln -s input/js3 js3
[all …]
|
| /Documentation/PCI/ |
| D | boot-interrupts.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 :Author: - Sean V Kelley <sean.v.kelley@linux.intel.com>
13 interrupt messages (Assert_INTx/Deassert_INTx). The integrated IO-APIC in a
15 MSI interrupts. If the IO-APIC is disabled (via the mask bits in the
16 IO-APIC table entries), the messages are routed to the legacy PCH. This
17 in-band interrupt mechanism was traditionally necessary for systems that
18 did not support the IO-APIC and for boot. Intel in the past has used the
20 protocol describes this in-band legacy wire-interrupt INTx mechanism for
21 I/O devices to signal PCI-style level interrupts. The subsequent paragraphs
29 When in-band legacy INTx messages are forwarded to the PCH, they in turn
[all …]
|
| D | pci-error-recovery.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 :Authors: - Linas Vepstas <linasvepstas@gmail.com>
9 - Richard Lary <rlary@us.ibm.com>
10 - Mike Mason <mmlnx@us.ibm.com>
16 chipsets are able to deal with these errors; these include PCI-E chipsets,
17 and the PCI-host bridges found on IBM Power4, Power5 and Power6-based
32 including multiple instances of a device driver on multi-function
34 waiting for some i/o-space register to change, when it never will.
39 is forced by the need to handle multi-function devices, that is,
42 of reset it desires, the choices being a simple re-enabling of I/O
[all …]
|
| /Documentation/driver-api/ |
| D | clk.rst | 22 clk which unifies the framework-level accounting and infrastructure that
28 The second half of the interface is comprised of the hardware-specific
30 hardware-specific structures needed to model a particular clock. For
32 clk_ops, such as .enable or .set_rate, implies the hardware-specific
35 hardware-specific bits for the hypothetical "foo" hardware.
62 api itself defines several driver-facing functions which operate on
66 clk_ops pointer in struct clk_core to perform the hardware-specific parts of
67 the operations defined in clk-provider.h::
107 which abstract the details of struct clk from the hardware-specific bits, and
109 drivers/clk/clk-gate.c::
[all …]
|
| /Documentation/arch/s390/ |
| D | vfio-ap.rst | 13 The AP adapter cards are exposed via the AP bus. The motivation for vfio-ap
45 sub-directory::
58 encryption. A domain is classified in one of two ways depending upon how it
76 significant bit, correspond to domains 0-255.
111 * NQAP: to enqueue an AP command-request message to a queue
112 * DQAP: to dequeue an AP command-reply message from a queue
116 command; this must be one of the usage domains. An AP command may modify a
117 domain that is not one of the usage domains, but the modified domain
118 must be one of the control domains.
132 an APID from 0-255. If a bit is set, the corresponding adapter is valid for
[all …]
|
12