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/Documentation/ABI/testing/
Dsysfs-bus-iio-adc-hi84354 Contact: source@cogentembedded.com
7 Could be either "GND-Open" or "Supply-Open" mode. Y is a
14 Contact: source@cogentembedded.com
19 is separately set for "GND-Open" and "Supply-Open" modes.
33 Contact: source@cogentembedded.com
38 is separately set for "GND-Open" and "Supply-Open" modes.
/Documentation/driver-api/gpio/
Dintro.rst17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
39 other value (notably, "open drain" signaling).
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
[all …]
Ddriver.rst26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
62 - method to set electrical configuration for a given GPIO line
[all …]
Dconsumer.rst21 - Simple compile coverage with e.g. COMPILE_TEST - it does not matter that
25 - Truly optional GPIOLIB support - where the driver does not really make use
26 of the GPIOs on certain compile-time configurations for certain systems, but
27 will use it under other compile-time configurations. In this case the
33 some open coding of error handling should be expected when you do this.
35 All the functions that work with the descriptor-based GPIO interface are
45 With the descriptor-based interface, GPIOs are identified with an opaque,
46 non-forgeable handler that must be obtained through a call to one of the
62 see Documentation/driver-api/gpio/board.rst
73 to be electrically used with open drain.
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/Documentation/devicetree/bindings/interrupt-controller/
Dopen-pic.txt1 * Open PIC Binding
4 representation of an Open PIC compliant interrupt controller. This binding is
5 based on the binding defined for Open PIC in [1] and is a superset of that
13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
20 as an Open PIC. No property value shall be defined.
22 - #interrupt-cells: Specifies the number of cells needed to encode an
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
[all …]
Dpinctrl-max77620.txt6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
11 --------------------------
14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
16 <pinctrl-bindings.txt>.
19 sub-node have following properties:
22 ------------------
23 - pins: List of pins. Valid values of pins properties are:
27 -------------------
29 <pinctrl-bindings.txt>. Absence of properties will leave the configuration
[all …]
/Documentation/arch/arc/
Darc.rst1 .. SPDX-License-Identifier: GPL-2.0
10 ARC processors and relevant open source projects.
12 - `<https://embarc.org>`_ - Community portal for open source on ARC.
16 - `<https://github.com/foss-for-synopsys-dwc-arc-processors>`_ -
17 Home for all development activities regarding open source projects for
21 as open source for use on ARC Processors.
23 - `Official Synopsys ARC Processors website
24 <https://www.synopsys.com/designware-ip/processor-solutions.html>`_ -
27 <https://www.synopsys.com/dw/doc.php/ds/cc/programmers-reference-manual-ARC-HS.pdf>`_)
29 <https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi>`_ and
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/Documentation/devicetree/bindings/power/reset/
Dgpio-restart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-restart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
17 'open-source' is not found, the GPIO line will be driven in the inactive state. Otherwise its
22 This will also cause an inactive->active edge condition, triggering positive edge triggered
23 reset. After a delay specified by active-delay, the GPIO is set to inactive, thus causing an
24 active->inactive edge, triggering negative edge triggered reset. After a delay specified by
25 inactive-delay, the GPIO is driven active again. After a delay specified by wait-delay, the
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/Documentation/devicetree/bindings/sifive/
Dsifive-blocks-ip-versioning.txt1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
7 https://github.com/sifive/sifive-blocks
9 IP block-specific DT compatible strings are contained within the HDL,
10 in the form "sifive,<ip-block-name><integer version number>".
14 https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L43
17 auto-discovery, the maintainers of these IP blocks intend to increment
25 upstream sifive-blocks commits. It is expected that most drivers will
26 match on these IP block-specific compatible strings.
29 continue to specify an SoC-specific compatible string value, such as
[all …]
/Documentation/devicetree/bindings/net/can/
Dctu,ctucanfd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CTU CAN FD Open-source IP Core
10 Open-source CAN FD IP core developed at the Czech Technical University in Prague
18 [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
21 …https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-…
24 - Pavel Pisa <pisa@cmp.felk.cvut.cz>
25 - Ondrej Ille <ondrej.ille@gmail.com>
26 - Martin Jerabek <martin.jerabek01@gmail.com>
[all …]
/Documentation/userspace-api/media/dvb/
Dlegacy_dvb_audio.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later OR GPL-2.0
35 -----
39 ---------------------
46 .. code-block:: c
56 .. flat-table::
57 :header-rows: 0
58 :stub-columns: 0
60 - ..
62 - ``AUDIO_SOURCE_DEMUX``
64 - :cspan:`1` Selects the demultiplexer (fed either by the frontend
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Dlegacy_dvb_video.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later OR GPL-2.0
40 --------------
45 .. code-block:: c
56 .. flat-table::
57 :header-rows: 0
58 :stub-columns: 0
60 - ..
62 - ``VIDEO_FORMAT_4_3``
64 - Select 4:3 format.
66 - ..
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/Documentation/userspace-api/media/rc/
Drc-tables.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
30 .. flat-table:: IR default keymapping
31 :header-rows: 0
32 :stub-columns: 0
36 - .. row 1
38 - Key code
40 - Meaning
42 - Key examples on IR
44 - .. row 2
46 - **Numeric keys**
[all …]
/Documentation/process/
Dcontribution-maturity-model.rst1 .. SPDX-License-Identifier: GPL-2.0
29 The TAB urges organizations to continuously evaluate their Open Source
33 levels. In the spirit of Open Source, we encourage organizations to
56 * Software Engineers will be supported to attend Linux-related
67 * Contributing presentations or papers to Linux-related or academic
72 * Organizations will regularly report metrics of their open source
86 * The number of out-of-tree commits present in internal kernels.
96 * Software Engineers are supported in helping to organize Linux-related
Dkernel-driver-statement.rst4 -----------------------
10 We, the undersigned Linux kernel developers, consider any closed-source
16 community. Vendors that provide closed-source kernel modules force their
19 shared support benefits open source has to offer, we urge vendors to
20 adopt a policy of supporting their customers on Linux with open-source
26 - Dave Airlie
27 - Nick Andrew
28 - Jens Axboe
29 - Ralf Baechle
30 - Felipe Balbi
[all …]
/Documentation/input/
Dinput-programming.rst34 return -EBUSY;
40 error = -ENOMEM;
44 button_dev->evbit[0] = BIT_MASK(EV_KEY);
45 button_dev->keybit[BIT_WORD(BTN_0)] = BIT_MASK(BTN_0);
83 parts of the input systems what it is - what events can be generated or
88 set_bit(EV_KEY, button_dev->evbit);
89 set_bit(BTN_0, button_dev->keybit);
126 dev->open() and dev->close()
132 can use the open and close callback to know when it can stop polling or
140 return -EBUSY;
[all …]
/Documentation/devicetree/bindings/virtio/
Dmmio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jean-Philippe Brucker <jean-philippe@linaro.org>
13 See https://www.oasis-open.org/committees/tc_home.php?wg_abbrev=virtio for
23 dma-coherent: true
28 '#iommu-cells':
29 description: Required when the node corresponds to a virtio-iommu device.
36 wakeup-source:
38 description: Required for setting irq of a virtio_mmio device as wakeup source.
[all …]
/Documentation/userspace-api/media/v4l/
Dvidioc-subdev-g-routing.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_SUBDEV_G_ROUTING - VIDIOC_SUBDEV_S_ROUTING - Get or set routing between streams of media pad…
31 File descriptor returned by :ref:`open() <func-open>`.
54 Only subdevices which have both sink and source pads can support routing.
84 .. flat-table:: struct v4l2_subdev_routing
85 :header-rows: 0
86 :stub-columns: 0
89 * - __u32
90 - ``which``
91 - Routing table to be accessed, from enum
[all …]
Ddev-osd.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
9 **Also known as On-Screen Display (OSD)**
57 ---------------------------------------------
59 .. code-block:: c
67 if (-1 == ioctl(fd, VIDIOC_G_FBUF, &fbuf)) {
78 fb_fd = open(dev_name, O_RDWR);
79 if (-1 == fb_fd) {
86 perror("open");
99 fb_fd = -1;
103 for the video output overlay, or -1 if no device was found. */
[all …]
/Documentation/hwmon/
Dg762.rst5 and performs closed-loop or open-loop control of the fan speed. Two
6 modes - PWM or DC - are supported by the device.
9 http://natisbad.org/NAS/ref/GMT_EDS-762_763-080710-0.2.pdf. sysfs
10 bindings are described in Documentation/hwmon/sysfs-interface.rst.
25 set desired fan speed. This only makes sense in closed-loop
44 in closed-loop control mode, if fan RPM value is 25% out
50 speed control (open-loop) via pwm1 described below, 2 for
51 automatic fan speed control (closed-loop) via fan1_target
58 get or set PWM fan control value in open-loop mode. This is an
63 when current fan speed control mode is open-loop ('pwm1_enable' set to 1),
[all …]
/Documentation/gpu/
Ddrm-uapi.rst9 addition, drivers export device-specific interfaces for use by userspace
10 drivers & device-aware applications through ioctls and sysfs files.
16 Cover generic ioctls and sysfs layout here. We only need high-level
22 .. kernel-doc:: drivers/gpu/drm/drm_ioctl.c
31 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
34 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
37 .. kernel-doc:: include/drm/drm_auth.h
46 .. kernel-doc:: drivers/gpu/drm/drm_lease.c
49 Open-Source Userspace Requirements
57 open-sourced userspace patches, and those patches must be reviewed and ready for
[all …]
/Documentation/devicetree/bindings/mmc/
Dlitex,mmc.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Somlo <gsomlo@gmail.com>
16 The hardware source is Open Source and can be found on at
17 https://github.com/enjoy-digital/litesdcard/.
20 - $ref: mmc-controller.yaml#
28 - description: PHY registers
29 - description: CORE registers
30 - description: DMA Reader buffer
[all …]
/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic.txt7 and QorIQ processors and is compatible with the Open PIC. The
8 notable difference from Open PIC binding is the addition of 2
14 - compatible
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
47 - pic-no-reset
[all …]
/Documentation/admin-guide/media/
Dmgb4.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ---------------
13 There are two types of parameters - global / PCI card related, found under
23 | 0 - No module present
24 | 1 - FPDL3
25 | 2 - GMSL
33 | 1 - FPDL3
34 | 2 - GMSL
42 PRODUCT-REVISION-SERIES-SERIAL
55 | 0 - single
[all …]

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