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/Documentation/
Datomic_bitops.txt5 While our bitmap_{}() functions are non-atomic, we have a number of operations
12 The single bit operations are:
18 RMW atomic operations without return value:
23 RMW atomic operations with return value:
33 All RMW atomic operations have a '__' prefixed variant which is non-atomic.
47 The test_and_{}_bit() operations return the original value of the bit.
55 - non-RMW operations are unordered;
57 - RMW operations that have no return value are unordered;
59 - RMW operations that have a return value are fully ordered.
61 - RMW operations that are conditional are fully ordered.
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Datomic_t.txt5 RMW operations between CPUs (atomic operations on MMIO are not supported and
20 RMW atomic operations:
85 the Non-RMW operations of atomic_t, you do not in fact need atomic_t at all
138 - plain operations without return value: atomic_{}()
140 - operations which return the modified value: atomic_{}_return()
142 these are limited to the arithmetic operations because those are
146 - operations which return the original value: atomic_fetch_{}()
148 - swap operations: xchg(), cmpxchg() and try_cmpxchg()
150 - misc; the special purpose operations that are commonly used and would,
155 All these operations are SMP atomic; that is, the operations (for a single
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/Documentation/virt/
Dparavirt_ops.rst11 hypervisors. It allows each hypervisor to override critical operations and
15 pv_ops provides a set of function pointers which represent operations
18 time by enabling binary patching of the low-level critical operations
21 pv_ops operations are classified into three categories:
24 These operations correspond to high-level functionality where it is
28 Usually these operations correspond to low-level critical instructions. They
/Documentation/core-api/
Dthis_cpu_ops.rst2 this_cpu operations
8 this_cpu operations are a way of optimizing access to per cpu
14 this_cpu operations add a per cpu variable offset to the processor
24 Read-modify-write operations are of particular interest. Frequently
39 (remote write operations) of local RMW operations via this_cpu_*.
41 The main use of the this_cpu operations has been to optimize counter
42 operations.
44 The following this_cpu() operations with implied preemption protection
45 are defined. These operations can be used without worrying about
64 Inner working of this_cpu operations
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Dlocal_ops.rst5 Semantics and Behavior of Local Atomic Operations
11 This document explains the purpose of the local atomic operations, how
18 Note that ``local_t`` based operations are not recommended for general
19 kernel use. Please use the ``this_cpu`` operations instead unless there is
21 replaced by ``this_cpu`` operations. ``this_cpu`` operations combine the
26 Purpose of local atomic operations
29 Local atomic operations are meant to provide fast and highly reentrant per CPU
30 counters. They minimize the performance cost of standard atomic operations by
39 Local atomic operations only guarantee variable modification atomicity wrt the
50 It can be done by slightly modifying the standard atomic operations: only
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/Documentation/gpu/
Ddrm-vm-bind-async.rst15 * ``VM_BIND``: An operation or a list of operations to modify a gpu_vm using
16 an IOCTL. The operations include mapping and unmapping system- or
57 operation. VM_BIND operations that use the same bind context can be
59 assumptions can be made for VM_BIND operations using separate bind contexts.
71 With Synchronous VM_BIND, the VM_BIND operations all complete before the
73 out-fences. Synchronous VM_BIND may block and wait for GPU operations;
79 IOCTL may return immediately, the VM_BIND operations wait for the in-syncobjs
88 If the VM_BIND IOCTL takes a list or an array of operations as an argument,
91 completes. Operations in the operation list can be assumed, where it
94 Since asynchronous VM_BIND operations may use dma-fences embedded in
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/Documentation/arch/arm/
Dfirmware.rst2 Interface for registering and calling firmware-specific operations for ARM
10 operations and call them when needed.
12 Firmware operations can be specified by filling in a struct firmware_ops
21 There is a default, empty set of operations provided, so there is no need to
22 set anything if platform does not require firmware operations.
33 Example of registering firmware operations::
52 /* other operations not available on platformX */
/Documentation/mm/damon/
Ddesign.rst28 - :ref:`Operations Set <damon_operations_set>`: Implements fundamental
29 operations for DAMON that depends on the given monitoring target
32 overhead/accuracy control and access-aware system operations on top of the
33 operations set layer, and
41 Operations Set Layer
47 implementations for specific operations that are dependent on and optimized for
48 the given target address space. For example, below two operations for access
54 DAMON consolidates these implementations in a layer called DAMON Operations
61 operations set. If there is no available operations set for a given purpose, a
62 new operations set can be implemented following the interface between the
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/Documentation/filesystems/iomap/
Ddesign.rst20 iomap is a filesystem library for handling common file operations.
34 The library exports various APIs for implementing file operations such
47 has now been extended to cover several other operations.
65 initiates operations on that basis.
83 So far only the pagecache operations need to do this.
143 metadata or zeroing operations to perform during either submission
235 heads for pagecache operations.
249 These flags can be set by iomap itself during file operations.
260 Currently, these flags are only set by pagecache operations.
265 This only needs to be set for mapped or unwritten operations.
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Dporting.rst23 Pagecache operations lock a single base page at a time and then call
25 Direct I/O operations build I/O requests a single file block at a
38 iomap handles common pagecache related operations itself, such as
62 other read-only mapping operations will do the right thing.
66 file space for selected read operations.
94 iomap ops for write operations.
100 Now, convert any remaining file operations to call the iomap functions.
/Documentation/filesystems/spufs/
Dspufs.rst45 the operations supported on regular file systems. This list details the
46 supported operations and the deviations from the behaviour in the
51 All files support the access(2) and stat(2) family of operations, but
57 possible operations, e.g. read access on the wbox file.
65 data in the address space of the SPU. The possible operations on an
84 operations on an open mbox file are:
98 operations on an open ibox file are:
121 operations on an open wbox file are: write(2) If a count smaller than
143 operations on an open ``*box_stat`` file are:
173 The possible operations on an open npc, decr, decr_status,
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/Documentation/crypto/
Dasync-tx-api.rst15 3.2 Supported operations
36 the API will fit the chain of operations to the available offload
54 operations to be submitted, like xor->copy->xor in the raid5 case. The
71 3.2 Supported operations
97 operations complete. When an application needs to submit a chain of
98 operations it must guarantee that the descriptor is not automatically recycled
104 1. setting the ASYNC_TX_ACK flag if no child operations are to be submitted
112 Operations do not immediately issue after return from the
113 async_<operation> call. Offload engine drivers batch operations to
116 automatically issues pending operations. An application can force this
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/Documentation/networking/
Dnfc.rst21 responsible for providing an interface to control operations and low-level
24 The control operations are available to userspace via generic netlink.
36 | data exchange | operations
71 The userspace interface is divided in control operations and low-level data
74 CONTROL OPERATIONS:
76 Generic netlink is used to implement the interface to the control operations.
77 The operations are composed by commands and events, all listed below:
100 All polling operations requested through one netlink socket are stopped when
/Documentation/admin-guide/device-mapper/
Ddelay.rst15 3: apply offset and delay to read, write and flush operations on device
18 to write and flush operations on optionally different write_device with
35 # Create mapped device named "delayed" delaying read, write and flush operations for 500ms.
42 # Create mapped device delaying write and flush operations for 400ms and
/Documentation/bpf/standardization/
Dinstruction-set.rst142 * atomic32: includes 32-bit atomic operation instructions (see `Atomic operations`_).
277 LD 0x0 non-standard load operations `Load and store instructions`_
278 LDX 0x1 load into register operations `Load and store instructions`_
279 ST 0x2 store from immediate operations `Load and store instructions`_
280 STX 0x3 store from register operations `Load and store instructions`_
281 ALU 0x4 32-bit arithmetic operations `Arithmetic and jump instructions`_
282 JMP 0x5 64-bit jump operations `Arithmetic and jump instructions`_
283 JMP32 0x6 32-bit jump operations `Arithmetic and jump instructions`_
284 ALU64 0x7 64-bit arithmetic operations `Arithmetic and jump instructions`_
319 otherwise identical operations. ``ALU64`` instructions belong to the
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/Documentation/filesystems/
Ddirectory-locking.rst6 Locking scheme used for directory operations is based on two
18 For our purposes all operations fall in 6 classes:
74 operations on directory trees, but we obviously do not have the full
77 Trees grow as we do operations; memory pressure prunes them. Normally
108 the lock is dropped. So from the directory operations' point of view
120 using a local one as a cache, etc. In all such cases the operations
122 directory operation on this filesystem might involve directory operations
125 on a filesystem could trigger directory operations only on higher-ranked
160 It's easy to verify that operations never take a lock with rank
170 Moreover, without loss of generality we can assume that all operations
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/Documentation/devicetree/bindings/dma/
Dmv-xor.txt20 - dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
21 - dmacap,memset to indicate that the XOR channel is capable of memset operations
22 - dmacap,xor to indicate that the XOR channel is capable of xor operations
Dstericsson,dma40.yaml73 51: memcpy TX (to be used by the DMA driver for memcpy operations)
78 56: memcpy (to be used by the DMA driver for memcpy operations)
79 57: memcpy (to be used by the DMA driver for memcpy operations)
80 58: memcpy (to be used by the DMA driver for memcpy operations)
81 59: memcpy (to be used by the DMA driver for memcpy operations)
82 60: memcpy (to be used by the DMA driver for memcpy operations)
/Documentation/ABI/testing/
Ddebugfs-pfo-nx-crypto33 The total number of AES operations submitted to the hardware.
39 The total number of SHA-256 operations submitted to the hardware.
45 The total number of SHA-512 operations submitted to the hardware.
Dsysfs-driver-qat_rl7 The supported operations are: add, update, rm, rm_all, and get.
15 Supported operations:
80 This is valid only for the following operations: update, rm,
87 * WRITE: rm and update operations
88 * READ: add and get operations
123 * WRITE: add and update operations
157 * WRITE: add and update operations
188 * WRITE: add and update operations
/Documentation/userspace-api/gpio/
Dchardev_v1.rst46 Operations section in Chip
49 The following operations may be performed on the chip:
75 Operations section in Line Handle
78 The following operations may be performed on the line handle:
100 Operations section in Line Event
103 The following operations may be performed on the line event:
/Documentation/driver-api/
Di2c.rst26 are functions to perform various I2C protocol operations; at this writing
32 Controllers that support I2C can also support most SMBus operations, but
35 operations, either using I2C primitives or by issuing SMBus commands to
36 i2c_adapter devices which don't support those I2C operations.
/Documentation/arch/arm/vfp/
Drelease-notes.rst19 The operations which have been tested with this package are:
41 Other operations which have been tested by basic assembly-only tests
51 The combination operations have not been tested:
/Documentation/sound/designs/
Dcompress-accel.rst16 is able to handle "tasks" that are not bound to real-time operations
17 and allows for the serialization of operations.
25 operations without user space intervention
42 read/write/mmap I/O operations are not supported in the passthrough device.
81 Passthrough operations (ioctls)
84 All operations are protected using stream->device->lock (mutex).
/Documentation/admin-guide/perf/
Dhisi-pmu.rst63 This will only count the operations from core/thread 0 and 1 in this cluster.
66 operations via the tt_req parameeter in perf. The default value counts all
67 operations. tt_req is 3bits, 3'b100 represents read operations, 3'b101
68 represents write operations, 3'b110 represents atomic store operations and
69 3'b111 represents atomic non-store operations, other values are reserved::
73 This will only count the read operations in this cluster.

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