Searched +full:otp +full:- +full:2 (Results 1 – 25 of 29) sorted by relevance
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| /Documentation/devicetree/bindings/nvmem/ |
| D | rockchip,otp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip internal OTP (One Time Programmable) memory 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-otp 16 - rockchip,rk3308-otp 17 - rockchip,rk3588-otp 26 clock-names: [all …]
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| D | nintendo-otp.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/nvmem/nintendo-otp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Nintendo Wii and Wii U OTP 10 This binding represents the OTP memory as found on a Nintendo Wii or Wii U, 11 which contains common and per-console keys, signatures and related data 14 See https://wiiubrew.org/wiki/Hardware/OTP 17 - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> 20 - $ref: nvmem.yaml# [all …]
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| D | st,stm32-romem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Factory-programmed data 10 This represents STM32 Factory-programmed read only non-volatile area: locked 11 flash, OTP, read-only HW regs... This contains various information such as: 16 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 19 - $ref: nvmem.yaml# 20 - $ref: nvmem-deprecated-cells.yaml# [all …]
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| D | microchip,lan9662-otpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/microchip,lan9662-otpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip LAN9662 OTP Controller (OTPC) 10 - Horatiu Vultur <horatiu.vultur@microchip.com> 13 OTP controller drives a NVMEM memory where system specific data 18 - $ref: nvmem.yaml# 23 - items: 24 - const: microchip,lan9668-otpc [all …]
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| D | sunplus,sp7021-ocotp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/nvmem/sunplus,sp7021-ocotp.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: On-Chip OTP Memory for Sunplus SP7021 11 - Vincent Shih <vincent.sunplus@gmail.com> 14 - $ref: nvmem.yaml# 15 - $ref: nvmem-deprecated-cells.yaml# 19 const: sunplus,sp7021-ocotp 22 maxItems: 2 [all …]
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| D | microchip,sama7g5-otpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/microchip,sama7g5-otpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip SAMA7G5 OTP Controller (OTPC) 10 - Claudiu Beznea <claudiu.beznea@microchip.com> 13 OTP controller drives a NVMEM memory where system specific data 18 - $ref: nvmem.yaml# 19 - $ref: nvmem-deprecated-cells.yaml# 24 - const: microchip,sama7g5-otpc [all …]
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| D | imx-ocotp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX On-Chip OTP Controller (OCOTP) 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 12 - Fabio Estevam <festevam@gmail.com> 15 This binding represents the on-chip eFuse OTP controller found on 20 - $ref: nvmem.yaml# [all …]
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| D | mxs-ocotp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/mxs-ocotp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: On-Chip OTP Memory for Freescale i.MX23/i.MX28 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 12 - Fabio Estevam <festevam@gmail.com> 15 - $ref: nvmem.yaml# 16 - $ref: nvmem-deprecated-cells.yaml# [all …]
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| /Documentation/devicetree/bindings/fuse/ |
| D | renesas,rcar-otp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: R-Car E-FUSE connected to OTP_MEM 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 The E-FUSE is a type of non-volatile memory, which is accessible through the 14 One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs. 19 - renesas,r8a779g0-otp # R-CarV4H 20 - renesas,r8a779h0-otp # R-CarV4M [all …]
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| /Documentation/devicetree/bindings/mtd/ |
| D | mtd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 21 User-defined MTD device name. Can be used to assign user friendly 26 '#address-cells': 29 '#size-cells': 36 - compatible 39 "@[0-9a-f]+$": [all …]
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| /Documentation/devicetree/bindings/regulator/ |
| D | palmas-pmic.txt | 3 The tps659038 for the AM57x class have OTP spins that 5 is not a need to add the OTP spins to the palmas driver. The 11 - compatible : Should be from the list 12 ti,twl6035-pmic 13 ti,twl6036-pmic 14 ti,twl6037-pmic 15 ti,tps65913-pmic 16 ti,tps65914-pmic 17 ti,tps65917-pmic 18 ti,tps659038-pmic [all …]
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| /Documentation/devicetree/bindings/watchdog/ |
| D | dlg,da9062-watchdog.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/dlg,da9062-watchdog.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Dialog Semiconductor DA906{1,2,3} Watchdog Timer 10 - Steve Twiss <stwiss.opensource@diasemi.com> 13 - $ref: watchdog.yaml# 18 - enum: 19 - dlg,da9062-watchdog 20 - dlg,da9063-watchdog [all …]
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| /Documentation/devicetree/bindings/nvmem/layouts/ |
| D | kontron,sl28-vpd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/layouts/kontron,sl28-vpd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVMEM layout of the Kontron SMARC-sAL28 vital product data 10 - Michael Walle <michael@walle.cc> 15 on-board ethernet devices are derived from this base MAC address by 22 const: kontron,sl28-vpd 24 serial-number: 30 base-mac-address: [all …]
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| D | onie,tlv-layout.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/layouts/onie,tlv-layout.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 14 infrastructure shall provide a non-volatile memory with a table whose the 26 const: onie,tlv-layout 28 product-name: 32 part-number: 36 serial-number: [all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd71847-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is 18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica… 19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic… 24 - rohm,bd71847 25 - rohm,bd71850 [all …]
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| D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 13 BD71837MWV is programmable Power Management ICs for powering single-core, 14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low 18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica… 35 clock-names: 38 "#clock-cells": [all …]
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| D | palmas.txt | 3 The TI palmas family current members :- 12 - compatible : Should be from the list 23 - interrupt-controller : palmas has its own internal IRQs 24 - #interrupt-cells : should be set to 2 for IRQ number and flags 27 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 30 ti,mux-padX : set the pad register X (1-2) to the correct muxing for the 31 hardware, if not set will use muxing in OTP. 38 interrupt-parent = <&intc>; 39 interrupt-controller; 40 #interrupt-cells = <2>; [all …]
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| D | rohm,bd71828-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rohm,bd71828-pmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matti Vaittinen <mazziesaccount@gmail.com> 13 BD71828GW is a single-chip power management IC for battery-powered portable 15 single-cell linear charger. Also included is a Coulomb counter, a real-time 21 - const: rohm,bd71828 23 - items: 24 - const: rohm,bd71879 [all …]
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| /Documentation/devicetree/bindings/hwinfo/ |
| D | samsung,exynos-chipid.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/hwinfo/samsung,exynos-chipid.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - enum: 16 - samsung,exynos4210-chipid 17 - samsung,exynos850-chipid 18 - items: 19 - enum: [all …]
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| /Documentation/w1/slaves/ |
| D | w1_ds2406.rst | 12 ----------- 15 These chips also provide 128 bytes of OTP EPROM, but reading/writing it is 16 not supported. In TSOC-6 form, the DS2406 provides two switch outputs and 17 can be provided with power on a dedicated input. In TO-92 form, it provides 22 driver ORs this state with 0x30, so shell scripts get an ASCII 0/1/2/3 to 24 respectively. Bits 2-7 are ignored, so it's safe to write ASCII data.
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| /Documentation/devicetree/bindings/net/wireless/ |
| D | mediatek,mt76.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Felix Fietkau <nbd@nbd.name> 12 - Lorenzo Bianconi <lorenzo@kernel.org> 13 - Ryder Lee <ryder.lee@mediatek.com> 25 - mediatek,mt76 26 - mediatek,mt7628-wmac 27 - mediatek,mt7622-wmac [all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | sunplus,sp7021-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/sunplus,sp7021-usb2-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Vincent Shih <vincent.sunplus@gmail.com> 15 const: sunplus,sp7021-usb2-phy 19 - description: UPHY register region 20 - description: MOON4 register region 22 reg-names: 24 - const: phy [all …]
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | aspeed,ast2600-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Billy Tsai <billy_tsai@aspeedtech.com> 13 • 10-bits resolution for 16 voltage channels. 16 • Channel scanning can be non-continuous. 21 • Built-in a compensating method. 22 • Built-in a register to trim internal reference voltage. 24 • Support 2 Internal reference voltage 1.2v or 2.5v. [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | renesas,5p35023.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biju Das <biju.das.jz@bp.renesas.com> 14 is designed for low-power, consumer, and high-performance PCI 19 An internal OTP memory allows the user to store the configuration 29 …renesas.com/us/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3… 34 - renesas,5p35023 39 '#clock-cells': 41 The index in the assigned-clocks is mapped to the output clock as below [all …]
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| /Documentation/security/keys/ |
| D | trusted-encrypted.rst | 33 (2) TEE (Trusted Execution Environment: OP-TEE based on Arm TrustZone) 35 Rooted to Hardware Unique Key (HUK) which is generally burnt in on-chip 41 mode, trust is rooted to the OTPMK, a never-disclosed 256-bit key 45 (4) DCP (Data Co-Processor: crypto accelerator of various i.MX SoCs) 47 Rooted to a one-time programmable key (OTP) that is generally burnt 48 in the on-chip fuses and is accessible to the DCP encryption engine only. 49 DCP provides two keys that can be used as root of trust: the OTP key 51 the OTP key can be done via a module parameter (dcp_use_otp_key). 59 (2) TEE 86 (2) TEE [all …]
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