Searched full:pair (Results 1 – 25 of 294) sorted by relevance
12345678910>>...12
| /Documentation/devicetree/bindings/arm/marvell/ |
| D | coherency-fabric.txt | 21 * For "marvell,coherency-fabric", the first pair for the coherency
22 fabric registers, second pair for the per-CPU fabric registers.
24 * For "marvell,armada-375-coherency-fabric", only one pair is needed
27 * For "marvell,armada-380-coherency-fabric", only one pair is needed
|
| /Documentation/networking/pse-pd/ |
| D | introduction.rst | 22 with single balanced twisted-pair PHYs, as per Clause 104 of IEEE 802.3. PoDL
24 and data delivery over a single pair is advantageous.
64 Summary of Clause 104: Power over Data Lines (PoDL) of Single Balanced Twisted-Pair Ethernet
69 (PSEs). These are designed for use with single balanced twisted-pair Ethernet
73 balanced twisted-pair Ethernet connection.
|
| D | pse-pi.rst | 24 PSE PI and Single Pair Ethernet
27 Single Pair Ethernet (SPE) represents a different approach to Ethernet
28 connectivity, utilizing just one pair of conductors for both data and power
31 two pairs of wires, SPE operates on a simpler model due to its single-pair
33 assignments for power delivery, as described in the PSE PI for multi-pair
192 additional power delivery capabilities such as 2-pair or 4-pair power delivery.
264 - *PSE Controller Node:* Typically lacks details on physical pair usage,
270 powered pair.
|
| /Documentation/livepatch/ |
| D | shadow-vars.rst | 27 stored and retrieved through a <obj, id> pair.
49 - search hashtable for <obj, id> pair
52 - search hashtable for <obj, id> pair
65 - search hashtable for <obj, id> pair
75 - add <obj, id> pair to the global hashtable
117 for this <obj, id> pair.)
198 will use one that was already created for this <obj, id> pair.
|
| /Documentation/devicetree/bindings/phy/ |
| D | phy-hisi-inno-usb2.txt | 9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
23 - resets: The phandle and reset specifier pair for PHY port reset signal.
|
| D | phy-armada38x-comphy.txt | 19 pair, followed by an optional configuration register address and
20 length pair.
|
| D | st,stih407-usb2-phy.yaml | 32 - description: Phandle and reset specifier pair for the whole phy.
33 - description: Phandle and reset specifier pair for the port.
|
| /Documentation/ABI/testing/ |
| D | sysfs-driver-qat | 105 specific ring pair for the type of service that it is currently
113 A read returns the service associated to the ring pair queried.
117 * dc: the ring pair is configured for running compression services
118 * sym: the ring pair is configured for running symmetric crypto
120 * asym: the ring pair is configured for running asymmetric crypto
|
| D | sysfs-driver-qat_rl | 46 Each bit of this mask represents a single ring pair i.e.,
47 bit 1 == ring pair id 0; bit 3 == ring pair id 2.
51 assigned to a certain ring pair can be checked by querying
102 0x5 ## ring pair ID 0 and ring pair ID 2
|
| D | sysfs-uevent | 33 It's possible to define zero or more pairs - each pair is then
34 delimited by a space character ' '. Each pair appears in
|
| D | sysfs-platform-dell-smbios | 9 Each token attribute is available as a pair of
|
| D | sysfs-bus-counter | 212 If direction is forward, rising edges on quadrature pair
214 is backward, falling edges on quadrature pair signal A
219 If direction is forward, rising edges on quadrature pair
221 is backward, falling edges on quadrature pair signal B
226 Any state transition on quadrature pair signal A updates
231 Any state transition on quadrature pair signal B updates
236 Any state transition on either quadrature pair signals
391 affects the inputs of both quadrature pair signals.
|
| /Documentation/i2c/busses/ |
| D | i2c-ismt.rst | 37 The S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers
40 The S12xx series contain a pair of PCI functions. An output of lspci will show
|
| /Documentation/devicetree/bindings/sound/ |
| D | audio-graph.yaml | 26 Each entry is a pair of strings, the first being the
32 Each entry is a pair of strings, the first being the type of
|
| D | microchip,sama7g5-i2smcc.yaml | 65 microchip,tdm-data-pair:
67 Represents the DIN/DOUT pair pins that are used to receive/send
82 microchip,tdm-data-pair: false
|
| D | fsl,qmc-audio.yaml | 55 Should be a phandle/number pair list. The list of phandle to QMC node
56 and the QMC channel pair to use for this DAI.
57 If only one phandle/number pair is provided, this DAI works in
59 the QMC channel. If more than one pair is provided, this DAI works
|
| D | widgets.txt | 5 Each entry is a pair of strings in DT:
|
| D | component-common.yaml | 17 audio components as list of string pair. Component using the same
|
| /Documentation/devicetree/bindings/timer/ |
| D | marvell,armada-370-xp-timer.txt | 12 pair for the Global Timer registers, second pair for the
|
| /Documentation/infiniband/ |
| D | tag_matching.rst | 14 The ordering rules require that when more than one pair of send and receive
15 message envelopes may match, the pair that includes the earliest posted-send
16 and the earliest posted-receive is the pair that must be used to satisfy the
|
| /Documentation/devicetree/bindings/power/reset/ |
| D | keystone-reset.txt | 16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
|
| /Documentation/devicetree/bindings/gpio/ |
| D | nxp,lpc1850-gpio.txt | 10 - clocks : Phandle and clock specifier pair for GPIO controller
11 - resets : Phandle and reset specifier pair for GPIO controller
|
| /Documentation/devicetree/bindings/pwm/ |
| D | cirrus,clps711x-pwm.txt | 6 - clocks: phandle + clock specifier pair of the PWM reference clock.
|
| /Documentation/admin-guide/perf/ |
| D | hns3-pmu.rst | 48 Each performance statistic has a pair of events to get two values to
53 event pair. And the bit 16 of config indicates getting counter 0 or
56 After getting two values of event pair in userspace, the formula of
|
| /Documentation/devicetree/bindings/reset/ |
| D | reset.txt | 48 resets: List of phandle and reset specifier pairs, one pair
51 #reset-cells, then only the phandle portion of the pair will
|
12345678910>>...12