Searched +full:per +full:- +full:channel (Results 1 – 25 of 222) sorted by relevance
123456789
| /Documentation/devicetree/bindings/iio/afe/ |
| D | temperature-transducer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/afe/temperature-transducer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
19 When an io-channel measures the output voltage of a temperature analog front
35 -----
37 +---+---+
39 +---+---+ -----
41 V proportional to T +----+----+
[all …]
|
| D | temperature-sense-rtd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/afe/temperature-sense-rtd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
17 When an io-channel measures the output voltage across an RTD such as a
25 T = 1 / (alpha * r0 * iexc) * (V - r0 * iexc)
30 -----
32 +---+----+
34 +---+----+
[all …]
|
| /Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 2 It can be configured to have one channel or two channels. If configured
7 target devices. It can be configured to have one channel or two channels.
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
24 - #dma-cells: Should be <1>, see "dmas" property below
[all …]
|
| /Documentation/scsi/ |
| D | advansys.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
[all …]
|
| /Documentation/devicetree/bindings/sound/ |
| D | img,i2s-in.txt | 5 - compatible : Compatible list, must contain "img,i2s-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entry:
16 - dmas: Contains an entry for each entry in dma-names.
18 - dma-names: Must include the following entry:
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
25 - interrupts : Contains the I2S in interrupts. Depending on
[all …]
|
| D | img,i2s-out.txt | 5 - compatible : Compatible list, must contain "img,i2s-out"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entries:
17 - dmas: Contains an entry for each entry in dma-names.
19 - dma-names: Must include the following entry:
20 "tx" Single DMA channel used by all active I2S channels
22 - img,i2s-channels : Number of I2S channels instantiated in the I2S out block
24 - resets: Contains a phandle to the I2S out reset signal
[all …]
|
| D | renesas,idt821034.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The IDT821034 codec is a four channel PCM codec with onchip filters and
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the ALSA sound card node for
19 sub-nodes that involve the codec. The codec uses one 8bit time-slot per
20 channel.
[all …]
|
| /Documentation/filesystems/ |
| D | relay.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 to userspace via user-defined 'relay channels'.
11 A 'relay channel' is a kernel->user data relay mechanism implemented
12 as a set of per-cpu kernel buffers ('channel buffers'), each
14 clients write into the channel buffers using efficient write
15 functions; these automatically log into the current cpu's channel
19 are associated with the channel buffers using the API described below.
21 The format of the data logged into the channel buffers is completely
25 filtering - this also is left to the kernel client. The purpose is to
30 functions in the relay interface code - please see that for details.
[all …]
|
| /Documentation/devicetree/bindings/net/ |
| D | amd-xgbe.txt | 1 * AMD 10GbE driver (amd-xgbe)
4 - compatible: Should be "amd,xgbe-seattle-v1a"
5 - reg: Address and length of the register sets for the device
6 - MAC registers
7 - PCS registers
8 - SerDes Rx/Tx registers
9 - SerDes integration registers (1/2)
10 - SerDes integration registers (2/2)
11 - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
13 amd,per-channel-interrupt property is specified, then one additional
[all …]
|
| /Documentation/devicetree/bindings/dma/ |
| D | nvidia,tegra20-apbdma.txt | 4 - compatible: Should be "nvidia,<chip>-apbdma"
5 - reg: Should contain DMA registers location and length. This should include
6 all of the per-channel registers.
7 - interrupts: Should contain all of the per-channel DMA interrupts.
8 - clocks: Must contain one entry, for the module clock.
9 See ../clocks/clock-bindings.txt for details.
10 - resets : Must contain an entry for each entry in reset-names.
12 - reset-names : Must include the following entries:
13 - dma
14 - #dma-cells : Must be <1>. This dictates the length of DMA specifiers in
[all …]
|
| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: dma-controller.yaml#
19 - const: snps,dma-spear1340
20 - items:
21 - enum:
[all …]
|
| D | ti-edma.txt | 3 The eDMA3 consists of two components: Channel controller (CC) and Transfer
5 responsible for the DMA channel handling, while the TCs are responsible to
8 ------------------------------------------------------------------------------
9 eDMA3 Channel Controller
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
17 channel controller(s) on 66AK2G.
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
[all …]
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | ti,ads1015.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI ADS1015/ADS1115 4 channel I2C analog to digital converter
10 - Daniel Baluta <daniel.baluta@nxp.com>
19 - ti,ads1015
20 - ti,ads1115
21 - ti,tla2021
22 - ti,tla2024
30 "#address-cells":
[all …]
|
| D | nxp,imx8qxp-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cai Huoqing <caihuoqing@baidu.com>
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
31 - const: ipg
33 assigned-clocks:
[all …]
|
| /Documentation/devicetree/bindings/soc/microchip/ |
| D | atmel,at91rm9200-tcb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
19 - enum:
20 - atmel,at91rm9200-tcb
21 - atmel,at91sam9x5-tcb
22 - atmel,sama5d2-tcb
23 - const: simple-mfd
[all …]
|
| /Documentation/devicetree/bindings/hsi/ |
| D | client-devices.txt | 7 - hsi-channel-ids: A list of channel ids
9 - hsi-rx-mode: Receiver Bit transmission mode ("stream" or "frame")
10 - hsi-tx-mode: Transmitter Bit transmission mode ("stream" or "frame")
11 - hsi-mode: May be used instead hsi-rx-mode and hsi-tx-mode if
14 - hsi-speed-kbps: Max bit transmission speed in kbit/s
15 - hsi-flow: RX flow type ("synchronized" or "pipeline")
16 - hsi-arb-mode: Arbitration mode for TX frame ("round-robin", "priority")
20 - hsi-channel-names: A list with one name per channel specified in the
21 hsi-channel-ids property
26 hsi-controller {
[all …]
|
| /Documentation/devicetree/bindings/spmi/ |
| D | qcom,spmi-pmic-arb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
14 controller with wrapping arbitration logic to allow for multiple on-chip
21 - $ref: spmi.yaml
25 const: qcom,spmi-pmic-arb
29 - items: # V1
30 - description: core registers
[all …]
|
| D | qcom,x1e80100-spmi-pmic-arb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,x1e80100-spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
14 controller with wrapping arbitration logic to allow for multiple on-chip
22 const: qcom,x1e80100-spmi-pmic-arb
26 - description: core registers
27 - description: tx-channel per virtual slave registers
28 - description: rx-channel (called observer) per virtual slave registers
[all …]
|
| /Documentation/ABI/testing/ |
| D | sysfs-class-net-peak_usb | 5 Contact: Stephane Grosjean <s.grosjean@peak-system.com>
7 PEAK PCAN-USB devices support user-configurable CAN channel
9 are writable and can be set per CAN interface. This means that
11 can be assigned a unique channel ID.
12 This attribute provides read-only access to the currently
13 configured value of the channel identifier. Depending on the
|
| D | debugfs-scmi-raw | 7 in little-endian binary format to have it sent to the configured
22 in little-endian binary format to have it sent to the configured
38 Description: SCMI Raw message errors facility; any kind of timed-out or
65 different test-run.
74 in little-endian binary format to have it sent to the configured
76 channel.
78 entry if it arrived on channel <m> within the configured
83 Channel identifier <m> matches the SCMI protocol number which
84 has been associated with this transport channel in the DT
86 channel for this instance.
[all …]
|
| /Documentation/admin-guide/perf/ |
| D | thunderx2-pmu.rst | 5 The ThunderX2 SoC PMU consists of independent, system-wide, per-socket
10 Events are counted for the default channel (i.e. channel 0) and prorated
16 overflow interrupt. DMC and L3C counters are 32-bit and read every 2 seconds.
17 The CCPI2 counters are 64-bit and assumed not to overflow in normal operation.
21 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and
28 work. Per-task perf sessions are also not supported.
32 # perf stat -a -e uncore_dmc_0/cnt_cycles/ sleep 1
34 # perf stat -a -e \
40 # perf stat -a -e \
|
| /Documentation/devicetree/bindings/net/wireless/ |
| D | mediatek,mt76.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Felix Fietkau <nbd@nbd.name>
12 - Lorenzo Bianconi <lorenzo@kernel.org>
13 - Ryder Lee <ryder.lee@mediatek.com>
25 - mediatek,mt76
26 - mediatek,mt7628-wmac
27 - mediatek,mt7622-wmac
[all …]
|
| /Documentation/devicetree/bindings/spi/ |
| D | spi-fsl-lpspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 - $ref: /schemas/spi/spi-controller.yaml#
20 - enum:
21 - fsl,imx7ulp-spi
[all …]
|
| /Documentation/virt/hyperv/ |
| D | vmbus.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 VMBus is a software construct provided by Hyper-V to guest VMs. It
7 devices that Hyper-V presents to guest VMs. The control path is
11 and the synthetic device implementation that is part of Hyper-V, and
12 signaling primitives to allow Hyper-V and the guest to interrupt
17 establishes the VMBus control path with the Hyper-V host, then
21 Most synthetic devices offered by Hyper-V have a corresponding Linux
29 * PCI device pass-thru
34 * Key/Value Pair (KVP) exchange with Hyper-V
35 * Hyper-V online backup (a.k.a. VSS)
[all …]
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | max6697.txt | 4 - compatible:
16 - reg: I2C address
20 - smbus-timeout-disable
23 - extended-range-enable
26 - beta-compensation-enable
28 remote temperature channel 1.
30 - alert-mask
34 - over-temperature-mask
35 Over-temperature bit mask. Over-temperature reporting disabled for
38 If not specified, over-temperature reporting will be enabled for all
[all …]
|
123456789