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/Documentation/devicetree/bindings/media/
Dcdns,csi2tx.txt1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
8 - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
9 for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
10 - reg: base address and size of the memory mapped region
11 - clocks: phandles to the clocks driving the controller
12 - clock-names: must contain:
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
19 - phys: phandle to the D-PHY. If it is set, phy-names need to be set
20 - phy-names: must contain "dphy"
[all …]
/Documentation/userspace-api/media/v4l/
Dpixfmt-compressed.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
8 .. _compressed-formats:
18 .. flat-table:: Compressed Image Formats
19 :header-rows: 1
20 :stub-columns: 0
23 * - Identifier
24 - Code
25 - Details
26 * .. _V4L2-PIX-FMT-JPEG:
28 - ``V4L2_PIX_FMT_JPEG``
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Ddev-stateless-decoder.rst1 .. SPDX-License-Identifier: GPL-2.0
6 Memory-to-memory Stateless Video Decoder Interface
15 has to do is to provide the raw encoded stream and dequeue decoded frames in
18 This section describes how user-space ("the client") is expected to communicate
19 with stateless decoders in order to successfully decode an encoded stream.
24 Stateless decoders make use of the :ref:`media-request-api`. A stateless
31 with multiple slices per frame). Decoders that support such formats must also
45 codec-specific capability controls (such as H.264 profiles) to the set
55 formats may depend on the value of some codec-dependent controls.
83 coded width and height parsed from the stream.
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Ddev-decoder.rst1 .. SPDX-License-Identifier: GPL-2.0
6 Memory-to-Memory Stateful Video Decoder Interface
9 A stateful video decoder takes complete chunks of the bytestream (e.g. Annex-B
10 H.264/HEVC stream, raw VP8/9 stream) and decodes them into raw video frames in
14 Performing software parsing, processing etc. of the stream in the driver in
25 2. The meaning of words "must", "may", "should", etc. is as per `RFC
34 5. Single-planar API (see :ref:`planar-apis`) and applicable structures may be
35 used interchangeably with multi-planar API, unless specified otherwise,
44 .. _decoder-glossary:
68 stream resolution in pixels aligned to codec and hardware requirements;
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Dbuffer.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
11 the Streaming I/O methods. In the multi-planar API, the data is held in
14 copied. These pointers, together with meta-information like timestamps
18 :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>` ioctl. In the multi-planar API,
19 some plane-specific members of struct :c:type:`v4l2_buffer`,
27 ``V4L2_BUF_FLAG_TSTAMP_SRC_MASK`` in :ref:`buffer-flags`. These flags
29 stream. Changes in these flags may take place as a side effect of
33 mem-to-mem devices is an exception to the rule: the timestamp source
55 the stream to be stopped. Any attempt at such a modification while the stream
60 control while the stream is active.
[all …]
Ddev-subdev.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
6 Sub-device Interface
13 components as software blocks called sub-devices.
15 V4L2 sub-devices are usually kernel-only objects. If the V4L2 driver
17 media entities. Applications will be able to enumerate the sub-devices
21 In addition to make sub-devices discoverable, drivers can also choose to
23 sub-device driver and the V4L2 device driver support this, sub-devices
26 - query, read and write sub-devices controls
28 - subscribe and unsubscribe to events and retrieve them
30 - negotiate image formats on individual pads
[all …]
Ddev-sliced-vbi.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
17 :ref:`raw VBI interface <raw-vbi>`. The data is passed as short
19 packets per video frame is variable.
51 .. _sliced-vbi-format-negotitation:
62 lines the hardware can capture or output per frame, or the number of
103 -----------------------------
115 .. flat-table::
116 :header-rows: 0
117 :stub-columns: 0
120 * - __u16
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Dext-ctrls-codec.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-controls:
24 .. _mpeg-control-id:
27 -----------------
35 .. _v4l2-mpeg-stream-type:
40 enum v4l2_mpeg_stream_type -
41 The MPEG-1, -2 or -4 output stream type. One cannot assume anything
43 of the available MPEG stream types. This control is specific to
44 multiplexed MPEG streams. The currently defined stream types are:
48 .. flat-table::
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Ddev-encoder.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
6 Memory-to-Memory Stateful Video Encoder Interface
12 further post-processing by the client.
14 Performing software stream processing, header generation etc. in the driver
25 2. The meaning of words "must", "may", "should", etc. is as per `RFC
34 5. Single-planar API (see :ref:`planar-apis`) and applicable structures may be
35 used interchangeably with multi-planar API, unless specified otherwise,
47 Refer to :ref:`decoder-glossary`.
52 .. kernel-render:: DOT
65 qi -> Initialization [ label = "open()" ];
[all …]
/Documentation/gpu/amdgpu/display/
Ddc-glossary.rst7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
28 Bits Per Colour/Component
31 Bits Per Pixel
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
50 raw stream of pixels, clocked at pixel clock
95 Display Stream Compression (Reduce the amount of bits to represent pixel
108 Display Micro-Controller Unit
111 Display Micro-Controller Unit, version B
180 Multi Stream Transport
[all …]
/Documentation/driver-api/soundwire/
Dstream.rst2 Audio Stream in SoundWire
5 An audio stream is a logical or virtual connection created between
16 audio stream contains one or more channels of data. All channels within
17 stream must have same sample rate and same sample size.
19 Assume a stream with two channels (Left & Right) is opened using SoundWire
20 interface. Below are some ways a stream can be represented in SoundWire.
22 Stream Sample in memory (System memory, DSP memory or FIFOs) ::
24 -------------------------
26 -------------------------
28 Example 1: Stereo Stream with L and R channels is rendered from Master to
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/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
14 Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
24 - #dma-cells: Should be <1>, see "dmas" property below
[all …]
/Documentation/devicetree/bindings/sound/
Dnvidia,tegra210-mvc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mvc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 signal path. It can be used in input or output signal path for per-stream
13 has one input and one output. The input digital stream can be mono or
14 multi-channel (up to 7.1 channels) stream. An independent mute control is
18 - Jon Hunter <jonathanh@nvidia.com>
19 - Mohan Kumar <mkumard@nvidia.com>
20 - Sameer Pujar <spujar@nvidia.com>
[all …]
/Documentation/sound/hd-audio/
Dcontrols.rst2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
12 This is an enum control to change the surround-channel setup,
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
21 and/or line-out jacks are available on a machine, this controls
23 When there are only either headphones or line-out jacks, it gives
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/Documentation/devicetree/bindings/hsi/
Dclient-devices.txt7 - hsi-channel-ids: A list of channel ids
9 - hsi-rx-mode: Receiver Bit transmission mode ("stream" or "frame")
10 - hsi-tx-mode: Transmitter Bit transmission mode ("stream" or "frame")
11 - hsi-mode: May be used instead hsi-rx-mode and hsi-tx-mode if
14 - hsi-speed-kbps: Max bit transmission speed in kbit/s
15 - hsi-flow: RX flow type ("synchronized" or "pipeline")
16 - hsi-arb-mode: Arbitration mode for TX frame ("round-robin", "priority")
20 - hsi-channel-names: A list with one name per channel specified in the
21 hsi-channel-ids property
26 hsi-controller {
[all …]
/Documentation/userspace-api/media/dvb/
Ddvb-frontend-parameters.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 per-system parameters. However, as newer delivery systems required more
24 DVB-S2, DVB-T2, DVB-C2, ISDB, etc.
30 .. code-block:: c
61 .. code-block:: c
64 uint32_t symbol_rate; /* symbol rate in Symbols per second */
77 .. code-block:: c
80 uint32_t symbol_rate; /* symbol rate in Symbols per second */
94 .. code-block:: c
106 DVB-T frontends are supported by the ``dvb_ofdm_parameters`` structure:
[all …]
/Documentation/arch/powerpc/
Ddscr.rst2 DSCR (Data Stream Control Register)
6 stream in the processor. Please refer to the ISA documents or related manual
21 dscr_default /* per-CPU DSCR default value */
29 Scheduler will write the per-CPU DSCR default which is stored in the
35 the per-CPU default PACA based DSCR value.
42 - Global DSCR default: /sys/devices/system/cpu/dscr_default
43 - CPU specific DSCR default: /sys/devices/system/cpu/cpuN/dscr
60 (1) Problem state SPR: 0x03 (Un-privileged, POWER8 only)
/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-pixel-link.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
17 control interface. Multiple pixel channels can exist per one control channel.
27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
30 fsl,dc-id:
36 fsl,dc-stream-id:
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/Documentation/driver-api/media/drivers/
Dvidtv.rst1 .. SPDX-License-Identifier: GPL-2.0
10 ----------
18 - A fake tuner driver, which will report a bad signal quality if the chosen
22 - A fake demod driver, which will constantly poll the fake signal quality
26 - A fake bridge driver, which is the module responsible for modprobing the
31 - Code responsible for encoding a valid MPEG Transport Stream, which is then
32 passed to the bridge driver. This fake stream contains some hardcoded content.
33 For now, we have a single, audio-only channel containing a single MPEG
34 Elementary Stream, which in turn contains a SMPTE 302m encoded sine-wave.
36 way to encode PCM audio data in a MPEG Transport Stream.
[all …]
/Documentation/networking/
Dtls-offload.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 For details regarding the user-facing interface refer to the TLS
18 * Software crypto mode (``TLS_SW``) - CPU handles the cryptography.
24 * Packet-based NIC offload mode (``TLS_HW``) - the NIC handles crypto
28 (``ethtool`` flags ``tls-hw-tx-offload`` and ``tls-hw-rx-offload``).
29 * Full TCP NIC offload mode (``TLS_HW_RECORD``) - mode of operation where
33 abilities or QoS and packet scheduling (``ethtool`` flag ``tls-hw-record``).
36 offload opt-in or opt-out on per-connection basis is not currently supported.
39 --
52 --
[all …]
/Documentation/devicetree/bindings/media/xilinx/
Dvideo.txt2 -------------------------------------
10 cores are represented as defined in ../video-interfaces.txt.
16 -----------------
20 - xlnx,video-format: This property represents a video format transmitted on an
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
25 - xlnx,video-width: This property qualifies the video format with the sample
26 width expressed as a number of bits per pixel component. All components must
29 - xlnx,cfa-pattern: When the video format is set to Mono/Sensor, this property
Dxlnx,video.txt2 -------------------------------
5 ---------------
9 and IP core specific documentation, xlnx,v-*.txt, in this directory. The DT
15 - compatible: Must be "xlnx,video".
17 - dmas, dma-names: List of one DMA specifier and identifier string (as defined
18 in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
22 - ports: Video port, using the DT bindings defined in ../video-interfaces.txt.
26 - direction: should be either "input" or "output" depending on the direction
27 of stream.
34 dma-names = "port0", "port1";
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
/Documentation/driver-api/media/
Dtx-rx.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. _transmitter-receiver:
10 CSI-2 receiver in an SoC.
13 ---------
17 MIPI CSI-2
20 CSI-2 is a data bus intended for transferring images from cameras to
29 per data line. The parallel bus uses synchronisation and other additional
32 .. _`BT.656`: https://en.wikipedia.org/wiki/ITU-R_BT.656
35 -------------------
44 See :ref:`v4l2-mbus-pixelcode`.
[all …]
/Documentation/ABI/stable/
Dfirewire-cdev1 What: /dev/fw[0-9]+
4 Contact: linux1394-devel@lists.sourceforge.net
7 firewire-core and IEEE 1394 device drivers implemented in
8 userspace. The ioctl(2)- and read(2)-based ABI is defined and
9 documented in <linux/firewire-cdev.h>.
11 This ABI offers most of the features which firewire-core also
18 - The 1394 node which is associated with the file:
20 - Asynchronous request transmission
21 - Get the Configuration ROM
22 - Query node ID
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