Searched full:phases (Results 1 – 25 of 39) sorted by relevance
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| /Documentation/hwmon/ |
| D | mp2888.rst | 25 - Programmable Multi-Phase up to 10 Phases. 46 - 'n' is number of configured phases (from 1 to 10); 48 - indexes 2 ... 1 + n for phases.
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| D | pmbus-core.rst | 178 support multiple phases, the phase parameter can be ignored. If the chip 179 supports multiple phases, a phase value of 0xff indicates all phases. 219 If the chip does not support multiple phases, the phase parameter is 220 ignored. Otherwise, a phase value of 0xff selects all phases. 229 not support multiple phases, the phase parameter is ignored. Otherwise, a phase 230 value of 0xff selects all phases.
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| D | mp2975.rst | 60 - 'k' is number of configured phases (from 1 to 8); 63 - indexes 2*n+1 ... 2*n + k for phases.
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| D | max15301.rst | 82 temp1_input Measured maximum temperature of all phases.
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| D | stpddc60.rst | 85 temp1_input Measured maximum temperature of all phases.
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| D | max16601.rst | 94 'N' is the number of enabled/populated phases.
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| D | tps53679.rst | 64 output channels and up to 8 phases per channel.
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| /Documentation/driver-api/pm/ |
| D | devices.rst | 134 they are called in phases for every device, respecting the parent-child 266 System Power Management Phases 269 Suspending or resuming the system is done in several phases. Different phases 274 callbacks. The various phases always run after tasks have been frozen and 275 before they are unfrozen. Furthermore, the ``*_noirq`` phases run at a time 279 All phases use PM domain, bus, type, class or driver callbacks (that is, methods 316 the phases are: ``prepare``, ``suspend``, ``suspend_late``, ``suspend_noirq``. 323 suspend-related phases, during the ``prepare`` phase the device 342 ``suspend_noirq`` phases as well as all of the corresponding phases of 389 "quiesce device" and "save device state" phases, in which cases [all …]
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| /Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.yaml | 74 to control the clock phases, "ciu-sample" is required for tuning 87 low speeds or in case where all phases work at tuning time. 90 rockchip,desired-num-phases:
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| /Documentation/devicetree/bindings/watchdog/ |
| D | realtek,otto-wdt.yaml | 13 The timer has two timeout phases. Both phases have a maximum duration of 32
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| D | starfive,jh7100-wdt.yaml | 16 timeout phases. At the first phase, the signal of watchdog interrupt
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| /Documentation/devicetree/bindings/iio/proximity/ |
| D | semtech,sx9360.yaml | 42 Capacitance measurement resolution. For both phases, "reference" and 52 PROXRAW filter strength for both phases. A value of 0 represents off,
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-sx9324 | 14 The sensor rotates measurement across 4 phases
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| /Documentation/power/ |
| D | pci.rst | 431 management callbacks for this purpose. They are executed in phases such that 433 belonging to the given subsystem before the next phase begins. These phases 440 be preserved, such as one of the ACPI sleep states S1-S3, the phases are: 444 The following PCI bus type's callbacks, respectively, are used in these phases:: 509 S1-S3, into the working state (ACPI S0), the phases are: 514 phases:: 562 to be free) in the following three phases: 573 The other two phases, however, are different. 591 back to the fully functional state and this is done in the following phases: 617 three phases: [all …]
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| D | suspend-and-interrupts.rst | 38 suspend-resume cycle, including the "noirq" phases of suspending and resuming
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| /Documentation/devicetree/bindings/timer/ |
| D | renesas,rz-mtu3.yaml | 42 negative signals in six phases (12 phases in total) can be output in 91 waveforms (12 phases in total) with dead time can be output by
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| /Documentation/crypto/ |
| D | intro.rst | 57 following phases that are reflected in the API calls applicable to such
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| /Documentation/driver-api/driver-model/ |
| D | overview.rst | 69 The above abstraction prevents unnecessary pain during transitional phases.
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| /Documentation/admin-guide/pm/ |
| D | suspend-flows.rst | 79 Devices are suspended in four phases called *prepare*, *suspend*, 139 Devices are resumed in four phases called *noirq resume*, *early resume*,
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| D | intel_uncore_frequency_scaling.rst | 25 different core and uncore performance at distinct phases and they may want to
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| /Documentation/admin-guide/mm/ |
| D | memory-hotplug.rst | 53 Phases of Memory Hotplug 56 Memory hotplug consists of two phases: 70 Phases of Memory Hotunplug 73 Memory hotunplug consists of two phases:
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| /Documentation/devicetree/bindings/power/supply/ |
| D | rohm,bd99954.yaml | 32 # The BD99954 data sheet divides charging to three phases.
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-srggb8-pisp-comp.rst | 38 Each block of 8 pixels is separated into even and odd phases of 4 pixels,
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| /Documentation/timers/ |
| D | timekeeping.rst | 41 the counter register is read in two phases on the bus lowest 16 bits first
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| /Documentation/filesystems/ |
| D | sharedsubtree.rst | 954 The overall algorithm breaks the operation into 3 phases: (look at 958 2. commit phases. 959 3. abort phases.
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