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/Documentation/devicetree/bindings/net/
Dsmsc,lan9115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
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Drenesas,ether.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: ethernet-controller.yaml#
13 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
18 - items:
19 - enum:
20 - renesas,gether-r8a7740 # device is a part of R8A7740 SoC
21 - renesas,gether-r8a77980 # device is a part of R8A77980 SoC
22 - renesas,ether-r7s72100 # device is a part of R7S72100 SoC
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Dcortina,gemini-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/cortina,gemini-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
19 const: cortina,gemini-ethernet
23 description: must contain the global registers and the V-bit and A-bit
26 "#address-cells":
29 "#size-cells":
38 "^ethernet-port@[0-9]+$":
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Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
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Drenesas,etheravb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
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/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
24 - microchip,ksz8863
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Dmarvell,mv88e6xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
22 - enum:
23 - marvell,mv88e6085
24 - marvell,mv88e6190
25 - marvell,mv88e6250
43 - items:
44 - const: marvell,turris-mox-mv88e6085
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Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
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/Documentation/devicetree/bindings/display/bridge/
Dlontium,lt9611.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
18 - lontium,lt9611
19 - lontium,lt9611uxc
24 "#sound-dai-cells":
30 reset-gpios:
32 description: GPIO connected to active high RESET pin.
34 vdd-supply:
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/Documentation/devicetree/bindings/thermal/
Drockchip-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
12 $ref: thermal-sensor.yaml#
17 - rockchip,px30-tsadc
18 - rockchip,rk3228-tsadc
19 - rockchip,rk3288-tsadc
20 - rockchip,rk3328-tsadc
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/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
15 and thus inherits all the common properties defined in snps,dw-pcie.yaml.
19 See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree
25 - fsl,imx6q-pcie
26 - fsl,imx6sx-pcie
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Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
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/Documentation/scsi/
Dufs.rst1 .. SPDX-License-Identifier: GPL-2.0
29 embedded and removable flash memory-based storage in mobile
32 on the MIPI M-PHY physical layer standard. UFS uses MIPI M-PHY as the
41 - Support for Gear1 is mandatory (rate A: 1248Mbps, rate B: 1457.6Mbps)
42 - Support for Gear2 is optional (rate A: 2496Mbps, rate B: 2915.2Mbps)
46 - Gear3 (rate A: 4992Mbps, rate B: 5830.4Mbps)
49 * High random IOPs and low latency
56 SAM-5 architectural model.
61 ---------------------
68 UFS supports a subset of SCSI commands defined by SPC-4 and SBC-3.
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/Documentation/driver-api/
Dlibata.rst12 transports for ATA and ATAPI devices, and SCSI<->ATA translation for ATA
16 internals, and a couple sample ATA low-level drivers.
22 is defined for every low-level libata
23 hardware driver, and it controls how the low-level driver interfaces
26 FIS-based drivers will hook into the system with ``->qc_prep()`` and
27 ``->qc_issue()`` high-level hooks. Hardware which behaves in a manner
33 ----------------------------------------------------------
35 Post-IDENTIFY device configuration
44 Typically used to apply device-specific fixups prior to issue of SET
45 FEATURES - XFER MODE, and prior to operation.
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/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
Doverview.rst16 DPAA2 is a hardware architecture designed for high-speeed network
23 DPAA2 hardware resources. The MC provides an object-based abstraction for
28 The MC provides memory-mapped I/O command interfaces (MC portals)
34 +--------------------------------------+
38 +-----------------------------|--------+
44 +------------------------| mc portal |-+
46 | +- - - - - - - - - - - - -V- - -+ |
50 | +- - - - - - - - - - - - - - - -+ |
54 | --------- ------- |
55 | -queues -DPRC |
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/Documentation/networking/dsa/
Ddsa.rst22 An Ethernet switch typically comprises multiple front-panel ports and one
27 gateways, or even top-of-rack switches. This host Ethernet controller will
36 For each front-panel port, DSA creates specialized network devices which are
37 used as controlling and data-flowing endpoints for use by the Linux networking
46 - what port is this frame coming from
47 - what was the reason why this frame got forwarded
48 - how to send CPU originated traffic to specific ports
52 on Port-based VLAN IDs).
57 - the "cpu" port is the Ethernet switch facing side of the management
61 - the "dsa" port(s) are just conduits between two or more switches, and as such
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/Documentation/networking/
Dethtool-netlink.rst27 wake-on-lan password) omitted.
37 number 1 but any non-zero value should be understood as "true" by recipient.
44 Attributes that need to be filled-in by device drivers and that are dumped to
60 ``ETHTOOL_A_HEADER_PHY_INDEX`` u32 phy device index
85 ``ETHTOOL_A_HEADER_PHY_INDEX`` identifies the Ethernet PHY the message relates to.
86 As there are numerous commands that are related to PHY configuration, and because
87 there may be more than one PHY on the link, the PHY index can be passed in the
89 is not passed for commands that target a PHY, the net_device.phydev pointer
98 representing bit values and mask of affected bits) and bit-by-bit (list of
101 Verbose (bit-by-bit) bitsets allow sending symbolic names for bits together
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/Documentation/admin-guide/
Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
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/Documentation/ABI/testing/
Dsysfs-driver-ufs3 Contact: linux-scsi@vger.kernel.org
5 This file contains the auto-hibernate idle timer setting of a
6 UFS host controller. A value of '0' means auto-hibernate is not
11 10-bit values with a power-of-ten multiplier which allows a
105 device initialization or hardware reset. This is one of
115 Description: This file shows the high priority lun. This is one of
157 Description: This file shows the initial active ICC level. This is one
273 written during the pre-soldering phase of the PSA flow.
307 Description: This file shows the MIPI M-PHY version number in BCD format.
395 Description: This file shows the maximum data-in buffer size. This
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