Searched full:phy1 (Results 1 – 25 of 45) sorted by relevance
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| /Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 114 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
133 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
153 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
168 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
187 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
214 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,sm8450-dispcc.yaml | 32 - description: Byte clock from DSI PHY1
33 - description: Pixel clock from DSI PHY1
36 - description: Link clock from DP PHY1
37 - description: VCO DIV clock from DP PHY1
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| D | qcom,sm8550-dispcc.yaml | 37 - description: Byte clock from DSI PHY1
38 - description: Pixel clock from DSI PHY1
41 - description: Link clock from DP PHY1
42 - description: VCO DIV clock from DP PHY1
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| D | qcom,gcc-msm8953.yaml | 29 - description: Byte clock from DSI PHY1
30 - description: Pixel clock from DSI PHY1
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| D | qcom,gcc-msm8976.yaml | 31 - description: Pixel clock from DSI PHY1
32 - description: Byte clock from DSI PHY1
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| D | qcom,sm7150-dispcc.yaml | 32 - description: Byte clock from MDSS DSI PHY1
33 - description: Pixel clock from MDSS DSI PHY1
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| D | qcom,sdm845-dispcc.yaml | 32 - description: Byte clock from DSI PHY1
33 - description: Pixel clock from DSI PHY1
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| D | qcom,dispcc-sm8x50.yaml | 35 - description: Byte clock from DSI PHY1
36 - description: Pixel clock from DSI PHY1
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| D | qcom,ipq5018-gcc.yaml | 29 - description: PCIE20 PHY1 pipe clock source
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| /Documentation/firmware-guide/acpi/dsd/ |
| D | phy.rst | 34 Device(PHY1) {
36 } // end of PHY1
46 as device object references (e.g. \_SB.MDI0.PHY1).
99 The PHY1 and PHY2 nodes represent the PHYs connected to MDIO bus MDI0
106 Device(PHY1) {
108 } // end of PHY1
130 Package (2) {"phy-handle", \_SB.MDI0.PHY1}
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| /Documentation/devicetree/bindings/net/ |
| D | socionext,synquacer-netsec.yaml | 62 phy-handle = <&phy1>;
67 phy1: ethernet-phy@1 {
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| D | hisilicon-hip04-net.txt | 43 phy1: ethernet-phy@1 {
78 phy-handle = <&phy1>;
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| D | engleder,tsnep.yaml | 108 phy-handle = <&phy1>;
113 phy1: ethernet-phy@1 {
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| D | qcom,ethqos.yaml | 111 phy-handle = <&phy1>;
118 phy1: phy@4 {
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| D | intel,ixp4xx-ethernet.yaml | 87 phy-handle = <&phy1>;
102 phy1: ethernet-phy@1 {
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| D | brcm,asp-v2.0.yaml | 136 phy1: ethernet-phy@1 {
156 phy-handle = <&phy1>;
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| D | renesas,ether.yaml | 115 phy-handle = <&phy1>;
120 phy1: ethernet-phy@1 {
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| D | brcm,bcmgenet.yaml | 79 phy-handle = <&phy1>;
93 phy1: ethernet-phy@1 {
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| D | cortina,gemini-ethernet.yaml | 97 phy1: ethernet-phy@3 {
136 phy-handle = <&phy1>;
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| D | altr,tse.yaml | 157 phy-handle = <&phy1>;
162 phy1: ethernet-phy@1 {
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| D | cavium-mix.txt | 33 phy-handle = <&phy1>;
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| D | marvell,orion-mdio.yaml | 57 phy1: ethernet-phy@1 {
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| /Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx8mp-hsio-blk-ctrl.yaml | 37 - const: usb-phy1
88 power-domain-names = "bus", "usb", "usb-phy1",
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | lantiq,gswip.yaml | 124 phy-handle = <&phy1>;
168 phy1: ethernet-phy@1 {
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| /Documentation/devicetree/bindings/display/xlnx/ |
| D | xlnx,zynqmp-dpsub.yaml | 21 Live Video --->| | --> | Audio | Audio | |---> | PHY1 |
118 - const: dp-phy1
206 phy-names = "dp-phy0", "dp-phy1";
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