Home
last modified time | relevance | path

Searched full:phy3 (Results 1 – 12 of 12) sorted by relevance

/Documentation/devicetree/bindings/clock/
Dqcom,sm8450-dispcc.yaml40 - description: Link clock from DP PHY3
41 - description: VCO DIV clock from DP PHY3
Dqcom,sm8550-dispcc.yaml45 - description: Link clock from DP PHY3
46 - description: VCO DIV clock from DP PHY3
Dqcom,ipq9574-gcc.yaml33 - description: PCIE30 PHY3 pipe clock source
/Documentation/devicetree/bindings/ata/
Dapm-xgene.txt45 phy3: phy@1f23a000 {
75 phys = <&phy3 0>;
/Documentation/devicetree/bindings/net/
Drenesas,ethertsn.yaml114 phy-handle = <&phy3>;
123 phy3: ethernet-phy@0 {
Dcavium-pip.txt70 phy-handle = <&phy3>;
Dmarvell,pp2.yaml225 phy = <&phy3>;
/Documentation/devicetree/bindings/net/dsa/
Dmscc,ocelot.yaml134 phy-handle = <&phy3>;
203 phy-handle = <&phy3>;
Drealtek.yaml187 phy-handle = <&phy3>;
225 phy3: ethernet-phy@3 {
/Documentation/devicetree/bindings/phy/
Dapm-xgene-phy.txt72 phy3: phy@1f23a000 {
/Documentation/devicetree/bindings/scsi/
Dhisilicon-sas.txt80 <289 4>,<293 4>,<294 4>,/* phy3 */
/Documentation/leds/
Dleds-class.rst92 - "phy3::wlan"