Searched full:phys (Results 1 – 25 of 292) sorted by relevance
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-bindings.txt | 19 phys: phy {
29 That node describes an IP block (PHY provider) that implements 2 different PHYs.
30 In order to differentiate between these 2 PHYs, an additional specifier should be
37 phys : the phandle for the PHY device (used by the PHY subsystem; not to be
40 phy-names : the names of the PHY corresponding to the PHYs present in the
41 *phys* phandle
49 phys = <&usb2_phy>, <&usb3_phy>;
55 This node represents a controller that uses two PHYs, one for usb2 and one for
64 phys = <&phys 1>;
70 This node represents a controller that uses one of the PHYs of the PHY provider
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| D | calxeda-combophy.yaml | 7 title: Calxeda Highbank Combination PHYs for SATA
10 The Calxeda Combination PHYs connect the SoC to the internal fabric
11 and to SATA connectors. The PHYs support multiple protocols (SATA,
14 Programming the PHYs is typically handled by those device drivers,
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| D | amlogic,meson-axg-pcie.yaml | 22 phys:
34 - phys
49 phys = <&mipi_analog_phy PHY_TYPE_PCIE>;
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| D | amlogic,axg-mipi-dphy.yaml | 38 phys:
52 - phys
67 phys = <&mipi_pcie_analog_dphy>;
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| /Documentation/devicetree/bindings/net/ |
| D | micrel.txt | 3 These properties cover the base properties Micrel PHYs.
7 - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.
9 Configure the LED mode with single value. The list of PHYs and the
42 Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled
53 Some PHYs have a COMA mode input pin which puts the PHY into
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| D | hisilicon-hns-nic.txt | 11 connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They
14 The remaining 6 PHYs are taken according to the mode of DSAF.
16 In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
26 In Switch mode of DSAF, all 6 PHYs are taken as physical ports connect to a
43 In NIC mode of DSAF, all 6 PHYs of service DSAF are taken as ethernet ports
53 In Switch mode of DSAF, all 6 PHYs of service DSAF are taken as physical
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| D | microchip,lan966x-switch.yaml | 14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
89 phys:
116 - phys
157 phys = <&serdes 0 0>;
165 phys = <&serdes 2 4>;
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| D | microchip,sparx5-switch.yaml | 94 phys:
116 - phys
157 phys = <&serdes 13>;
166 phys = <&serdes 29>;
175 phys = <&serdes 30>;
184 phys = <&serdes 31>;
193 phys = <&serdes 32>;
203 phys = <&serdes 0>;
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| D | cpsw.txt | 26 (DEPRECATED, use phys property instead).
48 - phys : phandle on phy-gmii-sel PHY (see phy/ti-phy-gmii-sel.txt)
92 phys = <&phy_gmii_sel 1 0>;
99 phys = <&phy_gmii_sel 2 0>;
123 phys = <&phy_gmii_sel 1 0>;
130 phys = <&phy_gmii_sel 2 0>;
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| /Documentation/devicetree/bindings/ata/ |
| D | marvell.txt | 10 - phys : List of phandles to sata phys
19 phys = <&sata_phy0>, <&sata_phy1>;
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| /Documentation/arch/s390/ |
| D | mm.rst | 35 +- AMODE31_START --+- AMODE31_START --+ .amode31 rand. phys/virt start
37 +- AMODE31_END ----+- AMODE31_END ----+ .amode31 rand. phys/virt end (<2GB)
40 +- __kaslr_offset_phys | kernel rand. phys start
44 +------------------+ | kernel phys end
55 | identity | phys == virt - __identity_base
56 | mapping | virt == phys + __identity_base
97 | kernel text/data | phys == (kvirt - __kaslr_offset) +
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| /Documentation/devicetree/bindings/pci/ |
| D | pci-armada8k.txt | 21 - phys: phandle(s) to PHY node(s) following the generic PHY bindings.
22 Either 1, 2 or 4 PHYs might be needed depending on the number of
24 - phy-names: names of the PHYs corresponding to the number of lanes.
26 2 PHYs.
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| D | pci.txt | 48 document, it is a five-cell address encoded as (phys.hi phys.mid
49 phys.lo size.hi size.lo). phys.hi should contain the device's BDF as
60 above this port, then phys.hi contains the 8-bit function number as
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| /Documentation/firmware-guide/acpi/dsd/ |
| D | phy.rst | 4 MDIO bus and PHYs in ACPI
7 The PHYs on an MDIO bus [phy] are probed and registered using
10 Later, for connecting these PHYs to their respective MACs, the PHYs registered
14 for connecting PHYs on the MDIO bus [dsd-properties-rules] to the MAC layer.
25 network interfaces that have PHYs connected to MAC via MDIO bus.
27 During the MDIO bus driver initialization, PHYs on this bus are probed
45 references to the previously registered PHYs which are provided
74 component (PHYs on the MDIO bus).
99 The PHY1 and PHY2 nodes represent the PHYs connected to MDIO bus MDI0
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| /Documentation/devicetree/bindings/usb/ |
| D | brcm,bcm7445-ehci.yaml | 32 phys:
42 - phys
53 phys = <&usbphy_0 0x0>;
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| D | marvell,pxau2o-ehci.yaml | 32 phys:
44 - phys
58 phys = <&usb_otg_phy>;
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| D | samsung,exynos-usb2.yaml | 28 phys:
51 - phys
79 phys = <&usb2_phy 0>;
105 phys = <&usb2_phy 0>;
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| D | ingenic,musb.yaml | 42 phys:
55 - phys
78 phys = <&usb_phy>;
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| D | amlogic,meson-g12a-usb-ctrl.yaml | 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
68 phys:
98 - phys
213 phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>;
222 phys = <&usb2_phy1>;
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| D | ohci-da8xx.txt | 8 - phys: Phandle for the PHY device
20 phys = <&usb_phy 1>;
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| D | usb.yaml | 18 phys:
20 List of all the USB PHYs on this HCD
31 List of all the USB PHYs on this HCD to be accepted by the legacy USB
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| D | iproc-udc.txt | 14 - phys: phandle to phy node.
21 phys = <&usbdrd_phy>;
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| /Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 48 - const: phys
50 - const: hyp-phys
54 - const: sec-phys
55 - const: phys
57 - const: hyp-phys
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| /Documentation/networking/ |
| D | phy-link-topology.rst | 51 we can't directly connect them to an SFP cage. However, some PHYs can be used
60 limitations, as we now have 2 PHYs on the link.
64 report the topology to userspace, allowing to target individual PHYs in configuration
72 it is then possible to register PHYs to the topology through :
85 These function are already hooked into the phylib subsystem, so all PHYs that
89 PHYs that are on a SFP module will also be automatically registered IF the SFP
106 will result in all PHYs from all net_device being listed. The DUMP command
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| /Documentation/devicetree/bindings/ufs/ |
| D | mediatek,ufs.yaml | 28 phys:
44 - phys
63 phys = <&ufsphy>;
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