| /Documentation/devicetree/bindings/sound/ |
| D | mediatek,mt8365-mt6357.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mediatek,mt8365-mt6357.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Mergnat <amergnat@baylibre.com> 14 const: mediatek,mt8365-mt6357 16 pinctrl-names: 19 - const: default 20 - const: dmic 21 - const: miso_off [all …]
|
| D | qcom,apq8016-sbc-sndcard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/sound/qcom,apq8016-sbc-sndcard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11 - Stephan Gerhold <stephan@gerhold.net> 16 - qcom,apq8016-sbc-sndcard 17 - qcom,msm8916-qdsp6-sndcard 21 - description: Microphone I/O mux register address 22 - description: Speaker I/O mux register address [all …]
|
| D | nxp,tfa989x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephan Gerhold <stephan@gerhold.net> 13 - $ref: dai-common.yaml# 18 - nxp,tfa9890 19 - nxp,tfa9895 20 - nxp,tfa9897 25 '#sound-dai-cells': 28 rcv-gpios: [all …]
|
| D | atmel-at91sam9g20ek-wm8731-audio.txt | 4 - compatible: "atmel,at91sam9g20ek-wm8731-audio" 5 - atmel,model: The user-visible name of this sound complex. 6 - atmel,audio-routing: A list of the connections between audio components. 7 - atmel,ssc-controller: The phandle of the SSC controller 8 - atmel,audio-codec: The phandle of the WM8731 audio codec 10 - pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt 14 compatible = "atmel,at91sam9g20ek-wm8731-audio"; 15 pinctrl-names = "default"; 16 pinctrl-0 = <&pinctrl_pck0_as_mck>; 20 atmel,audio-routing = [all …]
|
| D | mt8186-mt6366-rt1019-rt5682s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mt8186-mt6366-rt1019-rt5682s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jiaxin Yu <jiaxin.yu@mediatek.com> 16 - $ref: sound-card-common.yaml# 21 - mediatek,mt8186-mt6366-rt1019-rt5682s-sound 22 - mediatek,mt8186-mt6366-rt5682s-max98360-sound 23 - mediatek,mt8186-mt6366-rt5650-sound 25 audio-routing: [all …]
|
| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-demux-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-demux-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Pinctrl-based I2C Bus Demultiplexer 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 15 using the pinctrl device tree bindings. This may be used to select one I2C 21 +-------------------------------+ 23 | | +-----+ +-----+ 24 | +------------+ | | dev | | dev | [all …]
|
| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the 11 common pinctrl bindings used by client devices, including the meaning of the 18 such as pull-up, open drain, drive strength, etc. 21 - compatible: "fsl,<soc>-iomuxc" 22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs. 25 - fsl,pins: each entry consists of 6 integers and represents the mux and config 28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is 29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry 41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part 45 Some requirements for using fsl,imx-pinctrl binding: [all …]
|
| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Alexandre TORGUE <alexandre.torgue@foss.st.com> 17 on-chip controllers onto these pads. 22 - st,stm32f429-pinctrl 23 - st,stm32f469-pinctrl 24 - st,stm32f746-pinctrl 25 - st,stm32f769-pinctrl [all …]
|
| D | allwinner,sun4i-a10-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#gpio-cells": 21 "#interrupt-cells": 30 - allwinner,sun4i-a10-pinctrl 31 - allwinner,sun5i-a10s-pinctrl [all …]
|
| D | cnxt,cx92755-pinctrl.txt | 11 - compatible: Must be "cnxt,cx92755-pinctrl" 12 - reg: Base address of the General Purpose Pin Mapping register block and the 14 - gpio-controller: Marks the device node as a GPIO controller. 15 - #gpio-cells: Must be <2>. The first cell is the pin number and the 16 second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h 21 pinctrl: pinctrl@f0000e20 { 22 compatible = "cnxt,cx92755-pinctrl"; 24 gpio-controller; 25 #gpio-cells = <2>; 36 Each pin configuration node is a sub-node of the pin controller node and is a [all …]
|
| D | pinctrl-sirf.txt | 4 - compatible : "sirf,prima2-pinctrl" 5 - reg : Address range of the pinctrl registers 6 - interrupts : Interrupts used by every GPIO group 7 - gpio-controller : Indicates this device is a GPIO controller 8 - interrupt-controller : Marks the device node as an interrupt controller 10 - sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m 11 - sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m 13 Please refer to pinctrl-bindings.txt in this directory for details of the common 14 pinctrl bindings used by client devices. 19 Required subnode-properties: [all …]
|
| D | lantiq,pinctrl-falcon.txt | 4 - compatible: "lantiq,pinctrl-falcon" 5 - reg: Should contain the physical address and length of the gpio/pinmux 8 Please refer to pinctrl-bindings.txt in this directory for details of the 9 common pinctrl bindings used by client devices, including the meaning of the 16 pull-up and open-drain 18 The name of each subnode is not important as long as it is unique; all subnodes 31 Required subnode-properties: 32 - lantiq,groups : An array of strings. Each string contains the name of a group. 34 - lantiq,function: A string containing the name of the function to mux to the 49 Required subnode-properties: [all …]
|
| D | berlin,pinctrl.txt | 1 * Pin-controller driver for the Marvell Berlin SoCs 4 controller register sets. Pin controller nodes should be a sub-node of 9 A pin-controller node should contain subnodes representing the pin group 10 configurations, one per function. Each subnode has the group name and 14 is called a 'function' in the pin-controller subsystem. 17 - compatible: should be one of: 18 "marvell,berlin2-soc-pinctrl", 19 "marvell,berlin2-system-pinctrl", 20 "marvell,berlin2cd-soc-pinctrl", 21 "marvell,berlin2cd-system-pinctrl", [all …]
|
| D | ralink,rt2880-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt2880-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,rt2880-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 30 description: node for pinctrl. [all …]
|
| D | ste,nomadik.txt | 4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl", 5 "stericsson,stn8815-pinctrl" 6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips 8 - prcm: phandle to the PRCMU managing the back end of this pin controller 10 Please refer to pinctrl-bindings.txt in this directory for details of the 11 common pinctrl bindings used by client devices, including the meaning of the 20 The name of each subnode is not important; all subnodes should be enumerated 23 (see pinctrl-bindings.txt): 26 - function: A string containing the name of the function to mux to the 28 - groups : An array of strings. Each string contains the name of a pin [all …]
|
| D | bitmain,bm1880-pinctrl.txt | 7 - compatible: Should be "bitmain,bm1880-pinctrl" 8 - reg: Offset and length of pinctrl space in SCTRL. 10 Please refer to pinctrl-bindings.txt in this directory for details of the 11 common pinctrl bindings used by client devices, including the meaning of the 17 includes pinmux and various pin configuration parameters, such as pull-up, 21 options. The name of each subnode is not important; all subnodes should be 24 The following generic properties as defined in pinctrl-bindings.txt are valid 29 - pins: An array of strings, each string containing the name of a pin. 32 MIO0 - MIO111 34 - groups: An array of strings, each string containing the name of a pin [all …]
|
| D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin 15 need to reconfigure pins at run-time, for example to tri-state pins when the 20 The common pinctrl bindings defined in this file provide an infrastructure 33 == Pinctrl client devices == 38 assigned a name. When names are used, another property exists to map from 47 pinctrl-0: List of phandles, each pointing at a pin configuration 65 pinctrl-1: List of phandles, each pointing at a pin configuration 68 pinctrl-n: List of phandles, each pointing at a pin configuration 70 pinctrl-names: The list of names to assign states. List entry 0 defines the 71 name for integer state ID 0, list entry 1 for state ID 1, and [all …]
|
| D | renesas,rzg2l-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 16 Pin multiplexing and GPIO configuration is performed on a per-pin basis. 24 - items: 25 - enum: 26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five [all …]
|
| D | ralink,rt305x-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt305x-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,rt305x-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 30 description: node for pinctrl. [all …]
|
| D | ralink,rt5350-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt5350-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,rt5350-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 30 description: node for pinctrl. [all …]
|
| D | renesas,rza2-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chris Brandt <chris.brandt@renesas.com> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 16 Pin multiplexing and GPIO configuration is performed on a per-pin basis. 23 const: renesas,r7s9210-pinctrl # RZ/A2M 28 gpio-controller: true 30 '#gpio-cells': [all …]
|
| D | ralink,rt3352-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt3352-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,rt3352-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 30 description: node for pinctrl. [all …]
|
| /Documentation/driver-api/ |
| D | pin-control.rst | 2 PINCTRL (PIN CONTROL) subsystem 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain, 17 Top-level interface 22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that 26 - PINS are equal to pads, fingers, balls or whatever packaging input or 30 be sparse - i.e. there may be gaps in the space with numbers where no 57 To register a pin controller and name all the pins on this package we can do [all …]
|
| /Documentation/devicetree/bindings/mfd/ |
| D | as3722.txt | 4 ------------------- 5 - compatible: Must be "ams,as3722". 6 - reg: I2C device address. 7 - interrupt-controller: AS3722 has internal interrupt controller which takes the 8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well 10 - #interrupt-cells: Should be set to 2 for IRQ number and flags. 12 of AS3722 are defined at dt-bindings/mfd/as3722.h 14 interrupts.txt, using dt-bindings/irq. 17 -------------------- 18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on [all …]
|
| /Documentation/devicetree/bindings/mmc/ |
| D | usdhi6rol0.txt | 5 - compatible: must be 7 - interrupts: 3 interrupts, named "card detect", "data" and "SDIO" must be 9 - clocks: a clock binding for the IMCLK input 13 - vmmc-supply: a phandle of a regulator, supplying Vcc to the card 14 - vqmmc-supply: a phandle of a regulator, supplying VccQ to the card 15 - pinctrl-names: Can contain a "default" entry and a "state_uhs" 19 - pinctrl-N: One property for each name listed in pinctrl-names, see 20 ../pinctrl/pinctrl-bindings.txt. 32 interrupt-names = "card detect", "data", "SDIO"; 33 bus-width = <4>; [all …]
|