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/Documentation/w1/slaves/
Dw1_ds28e04.rst7 * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
20 Support is provided through the sysfs files "eeprom" and "pio". CRC checking
35 PIO Access
37 The 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file.
39 The current status of the PIO's is returned as an 8 bit value. Bit 0/1
40 represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are
Dw1_ds2406.rst21 current state of each switch, with PIO A in bit 0 and PIO B in bit 1. The
23 work with. output is writable; bits 0 and 1 control PIO A and B,
Dw1_ds2413.rst20 The DS2413 chip has two open-drain outputs (PIO A and PIO B).
40 You can set the PIO pins using the "output" file.
56 When writing output, the master must repeat the PIO Output Data byte in
/Documentation/devicetree/bindings/ata/
Data-generic.yaml13 Generic Parallel ATA controllers supporting PIO modes only.
38 pio-mode:
39 description: Maximum ATA PIO transfer mode
Dpata-arasan.txt23 - arasan,broken-pio: if present, PIO mode is unusable
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-st.txt4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
9 Pull Up (PU) are driven by the related PIO block.
11 ST pinctrl driver controls PIO multiplexing block and also interacts with
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
114 Every PIO is represented with 4-7 parameters depending on retime configuration.
117 -bank : Should be bank phandle to which this PIO belongs.
118 -offset : Offset in the PIO bank.
Dmediatek,mt8195-pinctrl.yaml141 &pio {
189 &pio {
238 pio: pinctrl@10005000 {
253 gpio-ranges = <&pio 0 0 144>;
258 pio-pins {
Dmediatek,mt8186-pinctrl.yaml145 &pio {
181 &pio {
227 pio: pinctrl@10005000 {
242 gpio-ranges = <&pio 0 0 185>;
247 pio-pins {
/Documentation/ABI/stable/
Dsysfs-driver-w1_ds28e041 What: /sys/bus/w1/devices/.../pio
4 Description: read/write the contents of the two PIO's of the DS28E04-100
/Documentation/devicetree/bindings/input/touchscreen/
Delan,ektf2127.yaml51 interrupt-parent = <&pio>;
53 power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>;
Dchipone,icn8318.yaml50 interrupt-parent = <&pio>;
54 wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
Dsilead,gsl1680.yaml80 interrupt-parent = <&pio>;
82 power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>;
Dcypress,tt21000.yaml90 interrupt-parent = <&pio>;
92 reset-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>;
/Documentation/devicetree/bindings/net/
Dti,cc1352p7.yaml54 reset-gpios = <&pio 35 GPIO_ACTIVE_LOW>;
55 bootloader-backdoor-gpios = <&pio 36 GPIO_ACTIVE_LOW>;
/Documentation/devicetree/bindings/display/panel/
Dstartek,kd070fhfid015.yaml56 enable-gpios = <&pio 67 GPIO_ACTIVE_HIGH>;
57 reset-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
/Documentation/devicetree/bindings/sound/
Dmt2701-cs42448.txt41 i2s1-in-sel-gpio1 = <&pio 53 0>;
42 i2s1-in-sel-gpio2 = <&pio 54 0>;
/Documentation/devicetree/bindings/gpio/
Dgpio-altera.txt5 - "altr,pio-1.0"
35 compatible = "altr,pio-1.0";
/Documentation/devicetree/bindings/input/
Dilitek,ili9882t.yaml60 interrupt-parent = <&pio>;
64 reset-gpios = <&pio 60 GPIO_ACTIVE_LOW>;
/Documentation/devicetree/bindings/usb/
Dti,usb8020b.yaml57 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
66 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
Dsmsc,usb3503.yaml153 intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
154 reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
155 connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
/Documentation/devicetree/bindings/leds/
Dleds-sgm3140.yaml56 flash-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
57 enable-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
/Documentation/devicetree/bindings/spi/
Dspi-orion.txt14 additionally to the normal indirect access (PIO) mode. The values
63 and its chip-selects that are used in the direct mode instead of PIO
66 are used in the default indirect (PIO) mode):
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Dpincfg.txt4 - pio-map : array of pin configurations. Each pin is defined by 6
30 pio-map = <
/Documentation/devicetree/bindings/phy/
Dallwinner,sun5i-a13-usb-phy.yaml91 usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
92 usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
/Documentation/devicetree/bindings/media/i2c/
Dovti,ov8865.yaml104 powerdown-gpios = <&pio 4 17 GPIO_ACTIVE_LOW>; /* PE17 */
105 reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */

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