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/Documentation/devicetree/bindings/display/panel/
Dadvantech,idk-2121wr.yaml15 A dual-LVDS interface is a dual-link connection with even pixels traveling
16 on one link, and with odd pixels traveling on the other link.
18 The panel expects odd pixels on the first port, and even pixels on the
20 dual-lvds-odd-pixels or dual-lvds-even-pixels).
49 description: The sink for odd pixels.
51 dual-lvds-odd-pixels: true
54 - dual-lvds-odd-pixels
59 description: The sink for even pixels.
61 dual-lvds-even-pixels: true
64 - dual-lvds-even-pixels
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Dpanel-simple-lvds-dual-ports.yaml17 The first port receives odd pixels, and the second port receives even pixels.
63 dual-lvds-odd-pixels:
65 description: The first sink port for odd pixels.
68 - dual-lvds-odd-pixels
76 dual-lvds-even-pixels:
78 description: The second sink port for even pixels.
81 - dual-lvds-even-pixels
105 dual-lvds-odd-pixels;
114 dual-lvds-even-pixels;
Dpanel-edp-legacy.yaml57 # LG LP079QX1-SP0V 7.9" (1536x2048 pixels) TFT LCD panel
59 # LG 9.7" (2048x1536 pixels) TFT LCD panel
61 # LG 12.0" (1920x1280 pixels) TFT LCD panel
63 # LG 12.9" (2560x1700 pixels) TFT LCD panel
67 # Samsung 12.2" (2560x1600 pixels) TFT LCD panel
73 # Sharp 12.3" (2400x1600 pixels) TFT LCD panel
Dsamsung,atna33xc20.yaml7 title: Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
18 # Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
22 # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
24 # Samsung 14.5" 3K (2944x1840 pixels) eDP AMOLED panel
Dpanel-timing.yaml66 description: Horizontal panel resolution in pixels
70 description: Vertical panel resolution in pixels
78 description: typical number of pixels
82 description: min, typ, max number of pixels
90 description: typical number of pixels
94 description: min, typ, max number of pixels
102 description: typical number of pixels
106 description: min, typ, max number of pixels
Dsharp,lq101r1sx01.yaml23 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
24 is possible to program either link to drive the left/even or right/odd pixels
Dpanel-mipi-dbi-spi.yaml105 * `x2r1g1b1r1g1b1` - RGB111, 2 pixels per byte
106 * `x2b1g1r1b1g1r1` - BGR111, 2 pixels per byte
107 * `x1r1g1b1x1r1g1b1` - RGB111, 2 pixels per byte
108 * `x1b1g1r1x1b1g1r1` - BGR111, 2 pixels per byte
/Documentation/devicetree/bindings/display/
Dsimple-framebuffer.yaml84 description: Width of the framebuffer in pixels
88 description: Height of the framebuffer in pixels
97 * `a1r5g5b5` - 16-bit pixels, d[15]=a, d[14:10]=r, d[9:5]=g, d[4:0]=b
98 * `a2r10g10b10` - 32-bit pixels, d[31:30]=a, d[29:20]=r, d[19:10]=g, d[9:0]=b
99 * `a8b8g8r8` - 32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r
100 * `a8r8g8b8` - 32-bit pixels, d[31:24]=a, d[23:16]=r, d[15:8]=g, d[7:0]=b
101 * `r5g6b5` - 16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b
102 * `r5g5b5a1` - 16-bit pixels, d[15:11]=r, d[10:6]=g, d[5:1]=b d[1:0]=a
103 * `r8g8b8` - 24-bit pixels, d[23:16]=r, d[15:8]=g, d[7:0]=b
104 * `x1r5g5b5` - 16-bit pixels, d[14:10]=r, d[9:5]=g, d[4:0]=b
[all …]
/Documentation/userspace-api/media/v4l/
Dvidioc-cropcap.rst43 support cropping and/or scaling and/or have non-square pixels, and for
66 and height are defined in pixels, the driver writer is free to
80 to get square pixels.
82 When cropping coordinates refer to square pixels, the driver sets
109 pixels.
113 pixels.
116 - Width of the rectangle, in pixels.
119 - Height of the rectangle, in pixels.
Dselection-api-configuration.rst34 in pixels.
51 coordinates are expressed in pixels. The rectangle's top/left corner
70 ``V4L2_SEL_TGT_COMPOSE_PADDED``. It contains all pixels defined using
72 during insertion process. All pixels outside this rectangle *must not*
73 be changed by the hardware. The content of pixels that lie inside the
75 use the padded and active rectangles to detect where the rubbish pixels
91 All coordinates are expressed in pixels. The top/left corner is always
109 target. The rectangle's coordinates are expressed in pixels. The
126 ``V4L2_SEL_TGT_COMPOSE_PADDED`` identifier. It must contain all pixels
Dv4l2-selection-targets.rst40 This includes only active pixels and excludes other non-active
41 pixels such as black pixels.
74 - The active area and all padding pixels that are inserted or
Dpixfmt-y12i.rst16 pixels from 2 sources interleaved and bit-packed. Each pixel is stored
18 these pixels can be deinterlaced using
27 pixels cross the byte boundary and have a ratio of 3 bytes for each
Dpixfmt-m420.rst17 (YUV 4:2:0). Pixels are organized as interleaved luma and chroma planes.
21 interleaved CbCr pixels subsampled by ½ in the horizontal and vertical
22 directions. Each CbCr pair belongs to four pixels. For example,
Dvidioc-g-fbuf.rst115 - Width of the frame buffer in pixels.
119 - Height of the frame buffer in pixels.
155 - Distance in bytes between the leftmost pixels in two adjacent
214 image pixels replace pixels in the VGA or video signal only where
241 - The device supports Source Chroma-keying. Video pixels with the
242 chroma-key colors are replaced by framebuffer pixels, which is
290 framebuffer pixels with video images. The blend function is:
305 framebuffer to clip or blend framebuffer pixels with video images,
Dvidioc-subdev-enum-frame-size.rst99 - Minimum frame width, in pixels. Filled in by the driver.
102 - Maximum frame width, in pixels. Filled in by the driver.
105 - Minimum frame height, in pixels. Filled in by the driver.
108 - Maximum frame height, in pixels. Filled in by the driver.
Dpixfmt-yuv-planar.rst40 For memory contiguous formats, the number of padding pixels at the end of the
211 .. [3] Macroblock size in pixels
229 direction. Chroma lines contain half the number of pixels and the same number
319 pixels and the same number of bytes as luma lines, and the chroma plane
324 pixels in 2D 16x16 tiles, and stores tiles linearly in memory.
329 pixels in 2D 64x32 tiles, and stores 2x2 groups of tiles in
331 The line stride must be a multiple of 128 pixels to ensure an
332 integer number of Z shapes. The image height must be a multiple of 32 pixels.
353 ``V4L2_PIX_FMT_NV12_4L4`` stores pixels in 4x4 tiles, and stores
358 ``V4L2_PIX_FMT_NV12_16L16`` stores pixels in 16x16 tiles, and stores
[all …]
Dext-ctrls-image-source.rst33 blanking is pixels.
55 fields to take into consideration asymmetric pixels.
81 the output pixels.
Dpixfmt-srggb8-pisp-comp.rst28 of band. Each scanline is padded to a multiple of 8 pixels wide, and each block
29 of 8 horizontally-contiguous pixels is coded using 8 bytes.
38 Each block of 8 pixels is separated into even and odd phases of 4 pixels,
45 FSD/1024 and FSD/512 respectively. Each of the four pixels is quantized
68 Each pair of quantized pixels (q0,q1) or (q2,q3) is jointly coded
Ddev-overlay.rst93 1. Chroma-keying displays the overlaid image only where pixels in the
266 corner of the frame buffer. Only window pixels *outside* all
282 pixels.
285 Vertical offset of the top, left corner of the rectangle, in pixels.
289 Width of the rectangle, in pixels.
292 Height of the rectangle, in pixels.
318 undesirable if the driver clips out less pixels than expected,
320 regions need to be refreshed. The driver should clip out more pixels
/Documentation/devicetree/bindings/display/bridge/
Dthine,thc63lvd1024.yaml32 When operating in single input mode, all pixels are received on port@0,
34 even-numbered pixels are received on port@0 and odd-numbered pixels on
37 When operating in single output mode all pixels are output from the first
39 mode pixels are output from both CMOS/TTL ports and both port@2 and
Dfsl,imx8qxp-ldb.yaml24 have to be different. Channel0 outputs odd pixels and channel1 outputs
25 even pixels.
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
31 pixels.
/Documentation/fb/
Dapi.rst46 Pixels are stored in memory in hardware-dependent formats. Applications need
93 Pixels are black or white and stored on a number of bits (typically one)
96 Black pixels are represented by all bits set to 1 and white pixels by all bits
97 set to 0. When the number of bits per pixel is smaller than 8, several pixels
104 Pixels are black or white and stored on a number of bits (typically one)
107 Black pixels are represented by all bits set to 0 and white pixels by all bits
108 set to 1. When the number of bits per pixel is smaller than 8, several pixels
115 Pixels are broken into red, green and blue components, and each component
133 Pixels are broken into red, green and blue components, and each component
141 Pixels are encoded and interpreted as described by the format FOURCC
[all …]
Dudlfb.rst14 the minimal set of pixels that have changed; and compresses and sends those
15 pixels line-by-line via USB bulk transfers.
81 udlfb to efficiently process the changed pixels.
126 the USB bus in device memory. If any pixels are unchanged,
156 USB to communicate the resulting changed pixels to the
160 above pixels (in thousands of cycles).
/Documentation/devicetree/bindings/input/touchscreen/
Dbrcm,iproc-touchscreen.txt53 - touchscreen-size-x: horizontal resolution of touchscreen (in pixels)
54 - touchscreen-size-y: vertical resolution of touchscreen (in pixels)
56 device (in pixels)
58 device (in pixels)
Dbu21029.txt12 - touchscreen-size-x : horizontal resolution of touchscreen (in pixels)
13 - touchscreen-size-y : vertical resolution of touchscreen (in pixels)

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