Home
last modified time | relevance | path

Searched full:pll2 (Results 1 – 11 of 11) sorted by relevance

/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-mod1-clk.yaml44 #include <dt-bindings/clock/sun4i-a10-pll2.h>
50 clocks = <&pll2 SUN4I_A10_PLL2_8X>,
51 <&pll2 SUN4I_A10_PLL2_4X>,
52 <&pll2 SUN4I_A10_PLL2_2X>,
53 <&pll2 SUN4I_A10_PLL2_1X>;
Dstarfive,jh7110-syscrg.yaml32 - description: PLL2
46 - description: PLL2
Drenesas,cpg-clocks.yaml80 - const: pll2
206 - const: pll2
Dimx28-clock.yaml22 pll2 3
Drenesas,cpg-div6-clock.yaml60 clock-output-names = "main", "pll0", "pll1", "pll2",
Dst,nomadik.txt30 - clock-id: must be 1 or 2 for PLL1 and PLL2 respectively
Dti,cdce925.yaml98 PLL2 {
Dti,lmk04832.yaml40 - description: PLL2 reference clock.
/Documentation/devicetree/bindings/display/ti/
Dti,dra7-dss.txt24 'pll1', 'pll2_clkctrl', 'pll2'
/Documentation/devicetree/bindings/sound/
Dmediatek,mt8188-afe.yaml49 - description: audio pll2 clock
66 - description: audio pll2 divide 4
Dmt8195-afe-pcm.yaml45 - description: audio pll2 clock