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/Documentation/devicetree/bindings/mfd/
Dsamsung,s5m8767.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 Management IC (PMIC).
17 and current regulators, RTC, clock outputs and other sub-blocks.
21 const: samsung,s5m8767-pmic
39 s5m8767,pmic-buck2-dvs-voltage:
40 $ref: /schemas/types.yaml#/definitions/uint32-array
44 A set of 8 voltage values in micro-volt (uV) units for buck2 when
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Dmaxim,max8998.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks. It is interfaced using an I2C interface. Each sub-block is
21 - maxim,max8998
22 - national,lp3974
23 - ti,lp3974
31 - description: Main interrupt
32 - description: Power-on/-off interrupt
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Drohm,bd9576-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 powering the R-Car series processors.
21 - rohm,bd9576
22 - rohm,bd9573
32 rohm,vout1-en-low:
35 controlled by a GPIO. This is dictated by state of vout1-en pin during
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Dti,tps6594.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Julien Panis <jpanis@baylibre.com>
15 PFSM (Pre-configurable Finite State Machine) managing the state of the device.
16 TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives.
21 - ti,lp8764-q1
22 - ti,tps6593-q1
23 - ti,tps6594-q1
24 - ti,tps65224-q1
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Dmax77650.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MAX77650 ultra low-power PMIC from Maxim Integrated.
10 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
13 MAX77650 is an ultra-low power PMIC providing battery charging and power
14 supply for low-power IoT and wearable applications.
16 The GPIO-controller module is represented as part of the top-level PMIC
17 node. The device exposes a single GPIO line.
19 For device-tree bindings of other sub-modules (regulator, power supply,
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Dhisilicon,hi655x.txt1 Hisilicon Hi655x Power Management Integrated Circuit (PMIC)
3 The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
4 Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
5 We can use memory-mapped I/O to communicate.
7 +----------------+ +-------------+
10 | |-------------| |
12 +----------------+ +-------------+
15 - compatible: Should be "hisilicon,hi655x-pmic".
16 - reg: Base address of PMIC on Hi6220 SoC.
17 - interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
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Dqcom,spmi-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI PMICs multi-function device
13 16-bit SPMI peripheral address space into 256 smaller fixed-size regions, 256 bytes
14 each. A function can consume one or more of these fixed-size register regions.
24 - Stephen Boyd <sboyd@kernel.org>
29 - pattern: '^pmic@.*$'
30 - pattern: '^pm(a|s)?[0-9]*@.*$'
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Dqcom,pm8008.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. PM8008 PMIC
10 - Guru Das Srinagesh <quic_gurus@quicinc.com>
13 Qualcomm Technologies, Inc. PM8008 is a dedicated camera PMIC that integrates
27 reset-gpios:
30 vdd-l1-l2-supply: true
31 vdd-l3-l4-supply: true
32 vdd-l5-supply: true
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Dti,tps65086.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TPS65086 Power Management Integrated Circuit (PMIC)
10 - Emil Renner Berthing <kernel@esmil.dk>
23 interrupt-controller: true
25 '#interrupt-cells':
29 encoded as trigger masks from ../interrupt-controller/interrupts.txt.
31 gpio-controller: true
33 '#gpio-cells':
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Drohm,bd9571mwv.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD9571MWV/BD9574MWF Power Management Integrated Circuit (PMIC)
10 - Marek Vasut <marek.vasut@gmail.com>
15 - rohm,bd9571mwv
16 - rohm,bd9574mwf
24 interrupt-controller: true
26 '#interrupt-cells':
29 gpio-controller: true
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Dti,lp8732.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J Keerthy <j-keerthy@ti.com>
13 PMIC with two high-current buck converters and two linear regulators.
18 - ti,lp8732
19 - ti,lp8733
24 gpio-controller: true
26 '#gpio-cells':
41 '^(buck[01]|ldo[01])-in-supply$':
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Dqcom-pm8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom-pm8xxx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PM8xxx PMIC multi-function devices
10 - Satya Priya <quic_c_skakit@quicinc.com>
19 - enum:
20 - qcom,pm8058
21 - qcom,pm8821
22 - qcom,pm8901
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Dmt6397.txt4 - Regulator
5 - RTC
6 - Audio codec
7 - GPIO
8 - Clock
9 - LED
10 - Keys
11 - Power controller
14 called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap.
22 "mediatek,mt6323" for PMIC MT6323
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Dda9055.txt1 * Dialog DA9055 Power Management Integrated Circuit (PMIC)
3 DA9055 consists of a large and varied group of sub-devices (I2C Only):
6 ------ ------------ -----------
7 da9055-gpio : : GPIOs
8 da9055-regulator : : Regulators
9 da9055-onkey : : On key
10 da9055-rtc : : RTC
11 da9055-hwmon : : ADC
12 da9055-watchdog : : Watchdog
15 is instantiated separately from the PMIC.
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Ddlg,da9063.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Dialog DA906{3L,3,2,1} Power Management Integrated Circuit (PMIC)
10 - Steve Twiss <stwiss.opensource@diasemi.com>
13 For device-tree bindings of other sub-modules refer to the binding documents
14 under the respective sub-system directories.
15 Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special
21 - https://www.dialog-semiconductor.com/products/da9063l
22 - https://www.dialog-semiconductor.com/products/da9063
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Drohm,bd71828-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71828-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71828GW is a single-chip power management IC for battery-powered portable
15 single-cell linear charger. Also included is a Coulomb counter, a real-time
21 - const: rohm,bd71828
23 - items:
24 - const: rohm,bd71879
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Drohm,bd71815-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71815AGW is a single-chip power management ICs for battery-powered
15 for LED and a 500 mA single-cell linear charger. Also included is a Coulomb
16 counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs.
30 gpio-controller: true
32 "#gpio-cells":
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/Documentation/devicetree/bindings/regulator/
Dmaxim,max8997.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 motor driver, flash LED driver and Micro-USB Interface Controller.
22 const: maxim,max8997-pmic
24 charger-supply:
30 - description: irq1 interrupt
31 - description: alert interrupt
33 max8997,pmic-buck1-dvs-voltage:
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Dda9211.txt5 - compatible: "dlg,da9211" or "dlg,da9212" or "dlg,da9213" or "dlg,da9223"
7 - reg: I2C slave address, usually 0x68.
8 - interrupts: the interrupt outputs of the controller
9 - regulators: A node that houses a sub-node for each regulator within the
10 device. Each sub-node is identified using the node's name, with valid
11 values listed below. The content of each sub-node is defined by the
16 - enable-gpios: platform gpio for control of BUCKA/BUCKB.
17 - Any optional property defined in regulator.txt
18 - regulator-initial-mode and regulator-allowed-modes may be specified using
19 mode values from dt-bindings/regulator/dlg,da9211-regulator.h
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Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
44 regulator-name:
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/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-mpp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC Multi-Purpose Pin (MPP) block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 PMIC's from Qualcomm.
19 - items:
20 - enum:
21 - qcom,pm8019-mpp
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Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
14 PMIC's from Qualcomm.
19 - enum:
20 - qcom,pm2250-gpio
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Dmarvell,armada-37xx-pinctrl.txt1 * Marvell Armada 37xx SoC pin and gpio controller
3 Each Armada 37xx SoC come with two pin and gpio controller one for the
6 Inside this set of register the gpio latch allows exposing some
11 GPIO and pin controller:
12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
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/Documentation/devicetree/bindings/soc/qcom/
Dqcom,pmic-glink.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-glink.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GLINK firmware interface for battery management, USB
8 Type-C and other things.
11 - Bjorn Andersson <andersson@kernel.org>
14 The PMIC GLINK service, running on a coprocessor on some modern Qualcomm
15 platforms and implement USB Type-C handling and battery management. This
18 particularly the USB Type-C controllers relationship with USB and DisplayPort
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/Documentation/devicetree/bindings/clock/
Dqcom,spmi-clkdiv.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI PMIC clock divider
10 - Bjorn Andersson <andersson@kernel.org>
11 - Stephen Boyd <sboyd@kernel.org>
14 Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of
15 outputs on the PMIC. These clocks are typically wired through alternate
16 functions on GPIO pins.
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