Searched +full:port +full:- +full:mapping +full:- +full:mode (Results 1 – 25 of 56) sorted by relevance
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| /Documentation/devicetree/bindings/sound/ |
| D | qcom,wcd939x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 Qualcomm WCD9390/WCD9395 Codec is a standalone Hi-Fi audio codec IC. 15 The WCD9390/WCD9395 IC has a functionally separate USB-C Mux subsystem 17 The Audio Headphone and Microphone data path between the Codec and the USB-C Mux 18 subsystems are external to the IC, thus requiring DT port-endpoint graph description 19 to handle USB-C altmode & orientation switching for Audio Accessory Mode. 22 - $ref: dai-common.yaml# [all …]
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| D | qcom,wsa883x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 15 Their primary operating mode uses a SoundWire digital audio 19 - $ref: dai-common.yaml# 28 powerdown-gpios: 32 vdd-supply: 35 qcom,port-mapping: 37 Specifies static port mapping between slave and master ports. [all …]
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | qca8k.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - John Crispin <john@phrozen.org> 13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode 14 describing a port needs to have a valid phandle referencing the internal PHY 15 it is connected to. This is because there is no N:N mapping of port and PHY 16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in 17 the switch node and declare the phandle for the port, referencing the internal 18 PHY it is connected to. In this config, an internal mdio-bus is registered and [all …]
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 19 Single or dual operation mode, output data mapping and DDR output modes are 32 When operating in single input mode, all pixels are received on port@0, 33 and port@1 shall not contain any endpoint. In dual input mode, 34 even-numbered pixels are received on port@0 and odd-numbered pixels on 35 port@1, and both port@0 and port@1 shall contain endpoints. [all …]
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| /Documentation/devicetree/bindings/display/imx/ |
| D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb) 6 The LVDS Display Bridge device tree node contains up to two lvds-channel 10 - #address-cells : should be <1> 11 - #size-cells : should be <0> 12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". 16 - gpr : should be <&gpr> on i.MX53 and i.MX6q. 17 The phandle points to the iomuxc-gpr region containing the LVDS 19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to 21 Documentation/devicetree/bindings/clock/clock-bindings.txt 23 "di0_pll" - LDB LVDS channel 0 mux [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | usb251xb.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip USB 2.0 Hi-Speed Hub Controller 10 - Richard Leitner <richard.leitner@skidata.com> 15 - microchip,usb2422 16 - microchip,usb2512b 17 - microchip,usb2512bi 18 - microchip,usb2513b 19 - microchip,usb2513bi [all …]
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| /Documentation/driver-api/ |
| D | device-io.rst | 10 Bus-Independent Device Accesses 27 ---------------------------- 49 -------------------- 52 memory-mapped registers on the device. Linux provides interfaces to read 53 and write 8-bit, 16-bit, 32-bit and 64-bit quantities. Due to a 82 from config space, which is guaranteed to soft-fail if the card doesn't 94 reg = ha->iobase; 96 WRT_REG_WORD(®->ictrl, 0); 102 RD_REG_WORD(®->ictrl); 103 ha->flags.ints_enabled = 0; [all …]
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| D | pin-control.rst | 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain, 17 Top-level interface 22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that 26 - PINS are equal to pads, fingers, balls or whatever packaging input or 30 be sparse - i.e. there may be gaps in the space with numbers where no 60 .. code-block:: c 97 See ``arch/arm/mach-ux500/Kconfig`` for an example. [all …]
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| /Documentation/arch/arm/ |
| D | booting.rst | 9 The following documentation is relevant to 2.4.18-rmk6 and beyond. 20 2. Initialise one serial port. 28 --------------------------- 43 2. Initialise one serial port 44 ----------------------------- 51 The boot loader should initialise and enable one serial port on the 53 which serial port it should use for the kernel console (generally 57 option to the kernel via the tagged lists specifying the port, and 60 Documentation/admin-guide/kernel-parameters.rst. 64 -------------------------- [all …]
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| /Documentation/netlink/specs/ |
| D | devlink.yaml | 1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 5 protocol: genetlink-legacy 10 - 12 name: sb-pool-type 14 - 16 - 18 - 20 name: port-type 22 - 24 - [all …]
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | tda1997x.txt | 1 Device-Tree bindings for the NXP TDA1997x HDMI receiver 5 The TDA19971 Video port output pins can be used as follows: 6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4] 7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4] 8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4] 9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2] 10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0] 11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles) 12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles) 13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) [all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-usbdp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Wang <frank.wang@rock-chips.com> 11 - Zhang Yubing <yubing.zhang@rock-chips.com> 16 - rockchip,rk3588-usbdp-phy 21 "#phy-cells": 24 - PHY_TYPE_USB3 25 - PHY_TYPE_DP [all …]
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| /Documentation/gpu/amdgpu/display/ |
| D | dc-glossary.rst | 7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere, 19 Application-Specific Integrated Circuit 49 Cathode Ray Tube Controller - commonly called "Controller" - Generates 105 Display Mode Library 108 Display Micro-Controller Unit 111 Display Micro-Controller Unit, version B 153 Kernel Mode Driver 189 Output Data Mapping 216 Scalable Data Port 225 Transition-Minimized Differential Signaling
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| D | dcn-overview.rst | 10 .. kernel-figure:: dc_pipeline_overview.svg 16 Data Port (SDP) and DCN. This component has multiple features, such as memory 19 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel 21 mapping, and gamut mapping. 24 multiple planes, using global or per-pixel alpha. 38 * **Multi-Media HUB (MMHUBBUB)**: Memory controller interface for DMCUB and DWB 43 the Display Micro-Controller Unit - version B (DMCUB), which is handled via 53 pipeline is connected to the Scalable Data Port (SDP) via DCHUB; you can see 84 ---------------------- 100 a one-to-one mapping of the link encoder to PHY, but we can configure the DCN [all …]
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | igb.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 8 Copyright(c) 1999-2018 Intel Corporation. 13 - Identifying Your Adapter 14 - Command Line Parameters 15 - Additional Configurations 16 - Support 34 There needs to be a <VAL#> for each network port in the system supported by 46 ------- 47 :Valid Range: 0-7 49 This parameter adds support for SR-IOV. It causes the driver to spawn up to [all …]
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| D | i40e.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 8 Copyright(c) 1999-2018 Intel Corporation. 13 - Overview 14 - Identifying Your Adapter 15 - Intel(R) Ethernet Flow Director 16 - Additional Configurations 17 - Known Issues 18 - Support 47 ---------------------- 49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m… [all …]
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| D | iavf.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 8 Copyright(c) 2013-2018 Intel Corporation. 13 - Overview 14 - Identifying Your Adapter 15 - Additional Configurations 16 - Known Issues/Troubleshooting 17 - Support 30 The guest OS loading the iavf driver must support MSI-X interrupts. 53 --------------------- 58 # dmesg -n 8 [all …]
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| /Documentation/devicetree/bindings/net/ |
| D | ibm,emac.txt | 8 correct clock-frequency property. 13 - device_type : "network" 15 - compatible : compatible list, contains 2 entries, first is 16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, 18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", 20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> 21 - reg : <registers mapping> 22 - local-mac-address : 6 bytes, MAC address 23 - mal-device : phandle of the associated McMAL node 24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated [all …]
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| /Documentation/devicetree/bindings/soundwire/ |
| D | qcom,soundwire.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> 19 - qcom,soundwire-v1.3.0 20 - qcom,soundwire-v1.5.0 21 - qcom,soundwire-v1.5.1 22 - qcom,soundwire-v1.6.0 23 - qcom,soundwire-v1.7.0 [all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-class-net | 35 Values vary based on the lower-level protocol used by the 54 01-80-C2-00-00-0X on a bridge device. Only values that set bits 62 0 01-80-C2-00-00-00 Bridge Group Address used for STP 63 1 01-80-C2-00-00-01 (MAC Control) 802.3 used for MAC PAUSE 64 2 01-80-C2-00-00-02 (Link Aggregation) 802.3ad 68 care when forwarding control frames e.g. 802.1X-PAE or LLDP. 111 Indicates the port number of this network device, formatted 118 attribute ever since. To query the port number, some tools look 122 attribute to its port number, it's a kernel bug. 135 the device is not usable unless some supplicant-based [all …]
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| /Documentation/networking/ |
| D | scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0 13 multi-processor systems. 17 - RSS: Receive Side Scaling 18 - RPS: Receive Packet Steering 19 - RFS: Receive Flow Steering 20 - Accelerated Receive Flow Steering 21 - XPS: Transmit Packet Steering 28 (multi-queue). On reception, a NIC can send different packets to different 33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and 35 Multi-queue distribution can also be used for traffic prioritization, but [all …]
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| /Documentation/sound/ |
| D | alsa-configuration.rst | 2 Advanced Linux Sound Architecture - Driver Configuration guide 38 ---------- 47 limiting card index for auto-loading (1-8); 49 For auto-loading more than one card, specify this option 50 together with snd-card-X aliases. 63 Module snd-pcm-oss 64 ------------------ 67 This module takes options which change the mapping of devices. 86 regarding opening the device. When this option is non-zero, 90 Module snd-rawmidi [all …]
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| /Documentation/driver-api/soundwire/ |
| D | summary.rst | 10 SoundWire is a 2-pin multi-drop interface with data and clock line. It 15 commands over a single two-pin interface. 23 (4) Device status monitoring, including interrupt-style alerts to the Master. 30 transmit or receiving mode (typically fixed direction but configurable 38 +---------------+ +---------------+ 40 | Master |-------+-------------------------------| Slave | 42 | |-------|-------+-----------------------| | 43 +---------------+ | | +---------------+ 47 +--+-------+--+ 52 +-------------+ [all …]
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| /Documentation/networking/device_drivers/ethernet/mellanox/mlx5/ |
| D | counters.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 13 - `Overview`_ 14 - `Groups`_ 15 - `Types`_ 16 - `Descriptions`_ 27 ---------------------------------------- 29 ---------------------------------------- ---------------------------------------- | 32 | ------------------- --------------- | | ------------------- --------------- | | 34 | ------------------- --------------- | | ------------------- --------------- | | 36 | ------------------- | | ------------------- | | [all …]
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| /Documentation/admin-guide/ |
| D | devices.txt | 1 0 Unnamed devices (e.g. non-device mounts) 7 2 = /dev/kmem OBSOLETE - replaced by /proc/kcore 9 4 = /dev/port I/O port access 11 6 = /dev/core OBSOLETE - replaced by /proc/kcore 18 12 = /dev/oldmem OBSOLETE - replaced by /proc/vmcore 31 2 char Pseudo-TTY masters 37 Pseudo-tty's are named as follows: 40 the 1st through 16th series of 16 pseudo-ttys each, and 44 These are the old-style (BSD) PTY devices; Unix98 106 3 char Pseudo-TTY slaves [all …]
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