Searched +full:power +full:- +full:on (Results 1 – 25 of 1019) sorted by relevance
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| /Documentation/driver-api/thermal/ |
| D | power_allocator.rst | 2 Power allocator governor tunables
6 -----------
10 1. "switch on" trip point: temperature above which the governor
15 "switch on" trip point. This the target temperature the governor
20 --------------
22 The power allocator governor implements a
23 Proportional-Integral-Derivative controller (PID controller) with
24 temperature as the control input and power as the controlled output:
29 - e = desired_temperature - current_temperature
30 - err_integral is the sum of previous errors
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| D | cpu-idle-cooling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 ----------
13 act on a cooling device to mitigate the dissipated power. When the
20 to the static leakage. The only solution is to power down the
24 Last but not least, the system can ask for a specific power budget but
25 because of the OPP density, we can only choose an OPP with a power
26 budget lower than the requested one and under-utilize the CPU, thus
27 losing performance. In other words, one OPP under-utilizes the CPU
28 with a power less than the requested power budget and the next OPP
29 exceeds the power budget. An intermediate OPP could have been used if
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| /Documentation/hwmon/ |
| D | occ.rst | 1 Kernel driver occ-hwmon
12 -----------
14 This driver supports hardware monitoring for the On-Chip Controller (OCC)
15 embedded on POWER processors. The OCC is a device that collects and aggregates
17 sensor data as well as perform thermal and power management on the system.
20 manually if an "ibm,p8-occ-hwmon" compatible device is found under the
21 appropriate I2C bus node in the device-tree.
23 The P9 version of this driver is a client driver of the FSI-based OCC driver.
24 It will be probed automatically by the FSI-based OCC driver.
27 -------------
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| D | acpi_power_meter.rst | 4 This driver talks to ACPI 4.0 power meters.
17 -----------
19 This driver implements sensor reading support for the power meters exposed in
21 features--a power meter that returns average power use over a configurable
23 sysfs interface conforms with the specification outlined in the "Power" section
24 of Documentation/hwmon/sysfs-interface.rst.
27 ----------------
29 The `power[1-*]_is_battery` knob indicates if the power supply is a battery.
30 Both `power[1-*]_average_{min,max}` must be set before the trip points will work.
31 When both of them are set, an ACPI event will be broadcast on the ACPI netlink
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| D | xgene-hwmon.rst | 1 Kernel driver xgene-hwmon
6 * APM X-Gene SoC
9 -----------
11 This driver adds hardware temperature and power reading support for
12 APM X-Gene SoC using the mailbox communication interface.
19 - SoC on-die temperature in milli-degree C
20 - Alarm when high/over temperature occurs
22 * Power
23 - CPU power in uW
24 - IO power in uW
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| D | ltc2992.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf
15 -----------
17 This driver supports hardware monitoring for Linear Technology LTC2992 power monitor.
19 LTC2992 is a rail-to-rail system monitor that measures current,
20 voltage, and power of two supplies.
27 -------------
29 The following attributes are supported. Limits are read-write,
30 all other attributes are read-only.
39 inX_min_alarm An undervoltage occurred. Cleared on read.
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| D | corsair-psu.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Kernel driver corsair-psu
8 * Corsair Power Supplies
37 -----------
41 These power supplies provide access to a micro-controller with 2 attached
43 power usage and 4 sensors for current levels and additional non-sensor information
47 -------------
51 curr2_input Current on the 12v psu rail
52 curr2_crit Current max critical value on the 12v psu rail
53 curr3_input Current on the 5v psu rail
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| /Documentation/devicetree/bindings/mfd/ |
| D | maxim,max77802.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim MAX77802 Power Management IC
10 - Javier Martinez Canillas <javier@dowhile0.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 This is a part of device tree bindings for Maxim MAX77802 Power Management
17 The Maxim MAX77802 is a Power Management IC which includes voltage and
18 current regulators (10 high efficiency Buck regulators and 32 Low-DropOut
23 in dt-bindings/clock/maxim,max77802.h.
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| D | twl4030-power.txt | 1 Texas Instruments TWL family (twl4030) reset and power management module
3 The power management module inside the TWL family provides several facilities
4 to control the power resources, including power scripts. For now, the
8 - compatible : must be one of the following
9 "ti,twl4030-power"
10 "ti,twl4030-power-reset"
11 "ti,twl4030-power-idle"
12 "ti,twl4030-power-idle-osc-off"
14 The use of ti,twl4030-power-reset is recommended at least on
17 When using ti,twl4030-power-idle, the TI recommended configuration
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| D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
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| /Documentation/power/powercap/ |
| D | dtpm.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Dynamic Thermal Power Management framework
7 On the embedded world, the complexity of the SoC leads to an
12 Another aspect is to sustain the performance for a given power budget,
15 reduce the battery charging because the dissipated power is too high
16 compared with the power consumed by other devices.
18 The user space is the most adequate place to dynamically act on the
19 different devices by limiting their power given an application
22 The Dynamic Thermal Power Management (DTPM) is a technique acting on
23 the device power by limiting and/or balancing a power budget among
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| /Documentation/devicetree/bindings/input/ |
| D | ti,palmas-pwrbutton.txt | 1 Texas Instruments Palmas family power button module
7 This module provides a simple power button event via an Interrupt.
10 - compatible: should be one of the following
11 - "ti,palmas-pwrbutton": For Palmas compatible power on button
12 - interrupts: Interrupt number of power button submodule on device.
16 - ti,palmas-long-press-seconds: Duration in seconds which the power
17 button should be kept pressed for Palmas to power off automatically.
18 NOTE: This depends on OTP support and POWERHOLD signal configuration
19 on platform. Valid values are 6, 8, 10 and 12.
20 - ti,palmas-pwron-debounce-milli-seconds: Duration in milliseconds
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| /Documentation/sound/designs/ |
| D | powersave.rst | 2 Notes on Power-Saving Mode
5 AC97 and HD-audio drivers have the automatic power-saving mode.
9 With the automatic power-saving, the driver turns off the codec power
11 the device and/or no analog loopback is set, the power disablement is
12 done fully or partially. It'll save a certain power consumption, thus
15 The time-out for automatic power-off can be specified via ``power_save``
16 module option of snd-ac97-codec and snd-hda-intel modules. Specify
17 the time-out value in seconds. 0 means to disable the automatic
18 power-saving. The default value of timeout is given via
26 adjust the value via sysfs on the fly. For example, to turn on the
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| /Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
15 debugger connects with SoC from JTAG port; on the other hand the program can
16 explore debugging method which rely on self-hosted debug mode, this document
17 is to focus on this part.
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
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| /Documentation/devicetree/bindings/sound/ |
| D | st,sta350.txt | 7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
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| /Documentation/networking/device_drivers/wifi/intel/ |
| D | ipw2100.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 - Intel(R) PRO/Wireless 2100 Network Connection
12 Copyright |copy| 2003-2006, Intel Corporation
16 :Version: git-1.1.5
23 2. Release git-1.1.5 Current Features
28 7. Power Management
51 parameters include, without limitation, RF power, spectrum usage,
64 the warranty and/or issues arising from regulatory non-compliance, and
69 modules, and accordingly, condition system-level regulatory approval
72 non-compliant.
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| /Documentation/ABI/obsolete/ |
| D | sysfs-bus-usb | 1 What: /sys/bus/usb/devices/.../power/level
7 power/level. This file holds a power-level setting for
8 the device, either "on" or "auto".
10 "on" means that the device is not allowed to autosuspend,
17 level. The "on" level is meant for administrative uses.
20 write "0" to power/autosuspend.
23 left in the "on" level. Although the USB spec requires
26 initializes all non-hub devices in the "on" level. Some
30 Use the power/control file instead; it does exactly the
|
| /Documentation/devicetree/bindings/serial/ |
| D | amlogic,meson-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The Amlogic Meson SoC UART Serial Interface is present on a large range
15 of SoCs, and can be present either in the "Always-On" power domain or the
16 "Everything-Else" power domain.
18 The particularity of the "Always-On" Serial Interface is that the hardware
19 is active since power-on and does not need any clock gating and is usable
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| /Documentation/devicetree/bindings/soc/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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| /Documentation/sound/soc/ |
| D | overview.rst | 5 The overall project goal of the ALSA System on Chip (ASoC) layer is to
6 provide better ALSA support for embedded system-on-chip processors (e.g.
9 had some limitations:-
12 CPU. This is not ideal and leads to code duplication - for example,
17 event). These are quite common events on portable devices and often require
18 machine specific code to re-route audio, enable amps, etc., after such an
21 * Drivers tended to power up the entire codec when playing (or
23 power on portable devices. There was also no support for saving
24 power via changing codec oversampling rates, bias currents, etc.
31 features :-
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| /Documentation/admin-guide/pm/ |
| D | sleep-states.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 Sleep states are global low-power states of the entire system in which user
21 Depending on its configuration and the capabilities of the platform it runs on,
28 Suspend-to-Idle
29 ---------------
31 This is a generic, pure software, light-weight variant of system suspend (also
34 I/O devices into low-power states (possibly lower-power than available in the
38 The system is woken up from this state by in-band interrupts, so theoretically
42 This state can be used on platforms without support for :ref:`standby <standby>`
43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the
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| /Documentation/driver-api/usb/ |
| D | power-management.rst | 1 .. _usb-power-management:
3 Power Management for USB
7 :Date: Last-updated: February 2014
11 ---------
12 * What is Power Management?
17 * Changing the default idle-delay time
19 * The driver interface for Power Management
25 * USB Port Power Control
26 * User Interface for Port Power Control
27 * Suggested Userspace Port Power Policy
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,sm7150-videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm7150-videocc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Video Clock & Reset Controller on SM7150
10 - Danila Tikhonov <danila@jiaxyga.com>
11 - David Wronek <david@mainlining.org>
12 - Jens Reidel <adrian@travitia.xyz>
15 Qualcomm video clock control module provides the clocks, resets and power
16 domains on SM7150.
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| /Documentation/devicetree/bindings/power/reset/ |
| D | regulator-poweroff.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/regulator-poweroff.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Force-disable power regulator to turn the power off.
10 - Michael Klein <michael@fossekall.de>
13 When the power-off handler is called, a power regulator is disabled by
14 calling regulator_force_disable(). If the power is still on and the
19 const: regulator-poweroff
21 cpu-supply:
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| /Documentation/devicetree/bindings/power/ |
| D | starfive,jh7110-pmu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 Power Management Unit
10 - Walker Chen <walker.chen@starfivetech.com>
13 StarFive JH7110 SoC includes support for multiple power domains which can be
14 powered on/off by software based on different application scenes to save power.
19 - starfive,jh7110-pmu
27 "#power-domain-cells":
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