Searched +full:power +full:- +full:source (Results 1 – 25 of 430) sorted by relevance
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| /Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor. 4 ------------------- 5 - compatible: Must be one of 9 - reg: I2C device address. 12 ------------------- 13 - interrupts: The interrupt on the parent the controller is 15 - interrupt-controller: Marks the device node as an interrupt controller. 16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells 17 variant of <../interrupt-controller/interrupts.txt> 18 IRQ numbers for different interrupt source of MAX77620 [all …]
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| D | richtek,rt5120.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 13 The RT5120 provides four high-efficiency buck converters and one LDO voltage 16 used for dynamic voltage scaling of the processor voltage, power rails on/off 22 - richtek,rt5120 30 interrupt-controller: true 32 "#interrupt-cells": 35 wakeup-source: true [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-sc7280.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-sc7280.h 20 const: qcom,gcc-sc7280 24 - description: Board XO source 25 - description: Board active XO source [all …]
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| D | qcom,x1e80100-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,x1e80100-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rajendra Nayak <quic_rjendra@quicinc.com> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,x1e80100-gcc.h 20 const: qcom,x1e80100-gcc 24 - description: Board XO source 25 - description: Sleep clock source [all …]
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| D | qcom,sdx75-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sdx75-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Imran Shaik <quic_imrashai@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 17 See also:: include/dt-bindings/clock/qcom,sdx75-gcc.h 21 const: qcom,sdx75-gcc 25 - description: Board XO source [all …]
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| D | qcom,sm8550-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,sm8550-gcc.h 20 const: qcom,sm8550-gcc 24 - description: Board XO source 25 - description: Sleep clock source [all …]
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| D | qcom,sm8650-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8650-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,sm8650-gcc.h 20 const: qcom,sm8650-gcc 24 - description: Board XO source 25 - description: Board Always On XO source [all …]
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| D | qcom,gcc-sdm845.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <quic_tdas@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 17 See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h 22 - qcom,gcc-sdm670 23 - qcom,gcc-sdm845 [all …]
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| D | qcom,videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 13 Qualcomm video clock control module provides the clocks, resets and power 17 include/dt-bindings/clock/qcom,videocc-sc7180.h 18 include/dt-bindings/clock/qcom,videocc-sc7280.h 19 include/dt-bindings/clock/qcom,videocc-sdm845.h 20 include/dt-bindings/clock/qcom,videocc-sm8150.h 21 include/dt-bindings/clock/qcom,videocc-sm8250.h [all …]
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| D | qcom,gcc-sm8350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h 20 const: qcom,gcc-sm8350 24 - description: Board XO source 25 - description: Sleep clock source [all …]
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| D | qcom,sm4450-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ajit Pandey <quic_ajipan@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 17 See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h 21 const: qcom,sm4450-gcc 25 - description: Board XO source [all …]
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| D | qcom,gcc-sm8450.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h 20 const: qcom,gcc-sm8450 24 - description: Board XO source 25 - description: Sleep clock source [all …]
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| D | qcom,sm6375-gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 13 Qualcomm graphics clock control module provides clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h 21 - qcom,sm6375-gpucc 25 - description: Board XO source 26 - description: GPLL0 main branch source [all …]
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| D | qcom,sm7150-dispcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm7150-dispcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Danila Tikhonov <danila@jiaxyga.com> 11 - David Wronek <david@mainlining.org> 12 - Jens Reidel <adrian@travitia.xyz> 15 Qualcomm display clock control module provides the clocks, resets and power 18 See also:: include/dt-bindings/clock/qcom,sm7150-dispcc.h 22 const: qcom,sm7150-dispcc [all …]
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| D | qcom,sm7150-camcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm7150-camcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Danila Tikhonov <danila@jiaxyga.com> 11 - David Wronek <david@mainlining.org> 12 - Jens Reidel <adrian@travitia.xyz> 15 Qualcomm camera clock control module provides the clocks, resets and power 18 See also:: include/dt-bindings/clock/qcom,sm7150-camcc.h 22 const: qcom,sm7150-camcc [all …]
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| D | qcom,qdu1000-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 11 - Imran Shaik <quic_imrashai@quicinc.com> 15 power domains on QDU1000 and QRU1000 17 See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h 21 const: qcom,qdu1000-gcc 25 - description: Board XO source [all …]
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| D | qcom,gcc-sc8180x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8180x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-sc8180x.h 20 const: qcom,gcc-sc8180x 24 - description: Board XO source 25 - description: Board active XO source [all …]
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| D | qcom,ipq5018-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sricharan Ramabadhran <quic_srichara@quicinc.com> 13 Qualcomm global clock control module provides the clocks, resets and power 17 include/dt-bindings/clock/qcom,ipq5018-gcc.h 18 include/dt-bindings/reset/qcom,ipq5018-gcc.h 22 const: qcom,gcc-ipq5018 26 - description: Board XO source [all …]
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| D | qcom,gcc-sdx65.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx65.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vamsi krishna Lanka <quic_vamslank@quicinc.com> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-sdx65.h 20 const: qcom,gcc-sdx65 24 - description: Board XO source 25 - description: Board active XO source [all …]
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| D | qcom,gcc-sc8280xp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 14 power domains on SC8280xp. 16 See also:: include/dt-bindings/clock/qcom,gcc-sc8280xp.h 20 const: qcom,gcc-sc8280xp 24 - description: XO reference clock 25 - description: Sleep clock [all …]
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| D | qcom,ipq9574-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Anusha Rao <quic_anusha@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 18 include/dt-bindings/clock/qcom,ipq9574-gcc.h 19 include/dt-bindings/reset/qcom,ipq9574-gcc.h 23 const: qcom,ipq9574-gcc [all …]
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| D | usb.txt | 4 - compatible : should be "fsl,<chip>-qe-usb", "fsl,mpc8323-qe-usb". 5 - reg : the first two cells should contain usb registers location and 8 - interrupts : should contain USB interrupt. 9 - fsl,fullspeed-clock : specifies the full speed USB clock source: 10 "none": clock source is disabled 11 "brg1" through "brg16": clock source is BRG1-BRG16, respectively 12 "clk1" through "clk24": clock source is CLK1-CLK24, respectively 13 - fsl,lowspeed-clock : specifies the low speed USB clock source: 14 "none": clock source is disabled 15 "brg1" through "brg16": clock source is BRG1-BRG16, respectively [all …]
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-max77620.txt | 1 Pincontrol driver for MAX77620 Power management IC from Maxim Semiconductor. 6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt> 11 -------------------------- 14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>. 15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per 16 <pinctrl-bindings.txt>. 19 sub-node have following properties: 22 ------------------ 23 - pins: List of pins. Valid values of pins properties are: 27 ------------------- [all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-class-usb_power_delivery | 5 Directory for USB Power Delivery devices. 11 File showing the USB Power Delivery Specification Revision used 19 specific revision of the USB Power Delivery Specification. In 23 What: /sys/class/usb_power_delivery/.../source-capabilities 27 The source capabilities message "Source_Capabilities" contains a 28 set of Power Data Objects (PDO), each representing a type of 29 power supply. The order of the PDO objects is defined in the USB 30 Power Delivery Specification. Each PDO - power supply - will 33 power supply type name (":" as delimiter). 37 What: /sys/class/usb_power_delivery/.../sink-capabilities [all …]
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| /Documentation/devicetree/bindings/connector/ |
| D | usb-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 20 - enum: 21 - usb-a-connector 22 - usb-b-connector 23 - usb-c-connector 25 - items: [all …]
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