Searched +full:pre +full:- +full:programmed (Results 1 – 22 of 22) sorted by relevance
| /Documentation/devicetree/bindings/input/ |
| D | ti,drv260x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments - drv260x Haptics driver family 10 - Andrew Davis <afd@ti.com> 15 - ti,drv2604 16 - ti,drv2605 17 - ti,drv2605l 22 vbat-supply: 30 (defined in include/dt-bindings/input/ti-drv260x.h) [all …]
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| /Documentation/devicetree/bindings/power/supply/ |
| D | richtek,rt5033-charger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jakob Hauser <jahau@rocketmail.com> 14 under sub-node named "charger" using the following format. 18 const: richtek,rt5033-charger 20 monitored-battery: 26 precharge-current-microamp: 27 Current of pre-charge mode. The pre-charge current levels are 350 mA [all …]
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| /Documentation/gpu/amdgpu/display/ |
| D | display-manager.rst | 8 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 11 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 17 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 20 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 26 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c 29 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c 32 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 38 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 41 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 47 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c [all …]
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| D | dcn-overview.rst | 10 .. kernel-figure:: dc_pipeline_overview.svg 19 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel 24 multiple planes, using global or per-pixel alpha. 38 * **Multi-Media HUB (MMHUBBUB)**: Memory controller interface for DMCUB and DWB 43 the Display Micro-Controller Unit - version B (DMCUB), which is handled via 84 ---------------------- 100 a one-to-one mapping of the link encoder to PHY, but we can configure the DCN 106 --------- 114 representation and convert them to a DCN specific floating-point format (i.e., 115 different from the IEEE floating-point format). In the process, CNVC also [all …]
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| /Documentation/devicetree/bindings/mtd/ |
| D | mtd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 21 User-defined MTD device name. Can be used to assign user friendly 26 '#address-cells': 29 '#size-cells': 36 - compatible 39 "@[0-9a-f]+$": [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | silabs,si5341.txt | 6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf 10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf 21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not 28 still be programmed into the chip and the driver will leave them "as is". 33 - compatible: shall be one of the following: 34 "silabs,si5340" - Si5340 A/B/C/D 35 "silabs,si5341" - Si5341 A/B/C/D 36 "silabs,si5342" - Si5342 A/B/C/D 37 "silabs,si5344" - Si5344 A/B/C/D [all …]
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| /Documentation/trace/coresight/ |
| D | coresight-config.rst | 1 .. SPDX-License-Identifier: GPL-2.0 14 programming of the CoreSight system with pre-defined configurations that 17 Many CoreSight components can be programmed in complex ways - especially ETMs. 30 -------- 41 accesses in the driver - the resource usage and parameter descriptions 43 and efficient for the feature to be programmed onto the device when required. 47 will be programmed into the device hardware. 56 feature being enabled that can adjust the behaviour of the operation programmed 59 For example, this could be a count value in a programmed operation that repeats 67 system - which is described below. [all …]
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| D | coresight.rst | 2 Coresight - HW Assisted Tracing on ARM 9 ------------ 38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System || 39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory || 40 | #######<-->: I : | #######<-->: I : : I : @@@<-| |||||||||||| 43 | |->### | ! | |->### | ! | ! . | || DAP || 49 *****************************************************************<-| 63 | * ===== F =====<---------| 65 |-->:: CTI ::<!! === N === 69 |------>&& ETB &&<......II I ======= [all …]
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| /Documentation/leds/ |
| D | leds-lm3556.rst | 6 1.5 A Synchronous Boost LED Flash Driver w/ High-Side Current Source 10 - Daniel Jeong 12 Contact:Daniel Jeong(daniel.jeong-at-ti.com, gshark.jeong-at-gmail.com) 15 ----------- 50 In Torch Mode, the current source(LED) is programmed via the CURRENT CONTROL 78 and 4 patterns are pre-defined in indicator_pattern array. 80 According to N-lank, Pulse time and N Period values, different pattern wiill 84 Please refer datasheet for more detail about N-Blank, Pulse time and N Period. 118 ----- 121 according to include/linux/platform_data/leds-lm3556.h, set the i2c board info
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | qcom,spmi-vadc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 15 voltage. The VADC is a 15-bit sigma-delta ADC. 17 voltage. The VADC is a 16-bit sigma-delta ADC. 22 - items: 23 - const: qcom,pms405-adc [all …]
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| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,ethdr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 21 These two function blocks read the pre-programmed registers from DRAM and 22 set them to HW in the v-blanking period. 27 - const: mediatek,mt8195-disp-ethdr 28 - items: 29 - const: mediatek,mt8188-disp-ethdr [all …]
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| /Documentation/userspace-api/media/v4l/ |
| D | ext-ctrls-flash.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 3 .. _flash-controls: 17 .. _flash-controls-use-cases: 24 ------------------------------------------ 35 ---------------------------------------- 37 The synchronised LED flash is pre-programmed by the host (power and 46 ------------------ 52 .. _flash-control-id: 55 ----------------- 61 Defines the mode of the flash LED, the high-power white LED attached [all …]
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | maxim,max9286.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Jacopo Mondi <jacopo+renesas@jmondi.org> 12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> 13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data 28 '#address-cells': 31 '#size-cells': [all …]
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| /Documentation/power/ |
| D | pci.rst | 13 power management refer to Documentation/driver-api/pm/devices.rst and 27 1.1. Native and Platform-Based Power Management 28 ----------------------------------------------- 31 devices into states in which they draw less power (low-power states) at the 34 Usually, a device is put into a low-power state when it is underutilized or 36 again, it has to be put back into the "fully functional" state (full-power 41 PCI devices may be put into low-power states in two ways, by using the device 53 to put the device that sent it into the full-power state. However, the PCI Bus 68 Thus in many situations both the native and the platform-based power management 72 -------------------------------- [all …]
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| /Documentation/scsi/ |
| D | ChangeLog.ncr53c8xx | 1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr) 2 * version ncr53c8xx-3.4.3b 3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM. 4 Fix sent by Stig Telfer <stig@api-networks.com>. 5 - Define scsi_set_pci_device() as nil for kernel < 2.4.4. 7 Mon Feb 12 22:30 2001 Gerard Roudier (groudier@club-internet.fr) 8 * version ncr53c8xx-3.4.3 9 - Call pci_enable_device() as AC wants this to be done. 10 - Get both the BAR cookies actual and PCI BAR values. 12 - Merge changes for linux-2.4 that declare the host template [all …]
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| /Documentation/networking/ |
| D | switchdev.rst | 1 .. SPDX-License-Identifier: GPL-2.0 11 Copyright |copy| 2014-2015 Scott Feldman <sfeldma@gmail.com> 14 The Ethernet switch device driver model (switchdev) is an in-kernel driver 19 an example setup using a data-center-class switch ASIC chip. Other setups 20 with SR-IOV or soft switches, such as OVS, are possible. 25 User-space tools 28 +-------------------------------------------------------------------+ 31 +--------------+-------------------------------+ 35 +----------------------------------------------+ 41 +--+----+----+----+----+----+---+ +-----+-----+ [all …]
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| D | bonding.rst | 1 .. SPDX-License-Identifier: GPL-2.0 11 Corrections, HA extensions: 2000/10/03-15: 13 - Willy Tarreau <willy at meta-x.org> 14 - Constantine Gavrilov <const-g at xpert.com> 15 - Chad N. Tindel <ctindel at ieee dot org> 16 - Janice Girouard <girouard at us dot ibm dot com> 17 - Jay Vosburgh <fubar at us dot ibm dot com> 22 - Mitch Williams <mitch.a.williams at intel.com> 35 the original tools from extreme-linux and beowulf sites will not work 119 ----------------------------------------------- [all …]
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| /Documentation/driver-api/dmaengine/ |
| D | provider.rst | 20 DMA-eligible devices to the controller itself. Whenever the device 44 transfer into smaller sub-transfers. 49 non-contiguous buffers to a contiguous buffer, which is called 50 scatter-gather. 53 scatter-gather. So we're left with two cases here: either we have a 56 that implements in hardware scatter-gather. 58 The latter are usually programmed using a collection of chunks to 60 over that collection, doing whatever we programmed there. 79 These were just the general memory-to-memory (also called mem2mem) or 80 memory-to-device (mem2dev) kind of transfers. Most devices often [all …]
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| /Documentation/hwmon/ |
| D | asc7621.rst | 20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as 21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has 23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in 28 have used registers below 20h for vendor-specific functions in addition 29 to those in the Intel-specified vendor range. 32 The fan speed control uses this finer value to produce a "step-less" fan 33 PWM output. These two bytes are "read-locked" to guarantee that once a 34 high or low byte is read, the other byte is locked-in until after the 37 sheet says 10-bits of resolution, although you may find the lower bits 47 We offer GPIO features on the former VID pins. These are open-drain [all …]
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | ixgbe.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 8 Copyright(c) 1999-2018 Intel Corporation. 13 - Identifying Your Adapter 14 - Command Line Parameters 15 - Additional Configurations 16 - Known Issues 17 - Support 36 ---------------------------------- 38 82599-BASED ADAPTERS 41 - If your 82599-based Intel(R) Network Adapter came with Intel optics or is an [all …]
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| /Documentation/driver-api/ |
| D | xillybus.rst | 10 - Introduction 11 -- Background 12 -- Xillybus Overview 14 - Usage 15 -- User interface 16 -- Synchronization 17 -- Seekable pipes 19 - Internals 20 -- Source code organization 21 -- Pipe attributes [all …]
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| /Documentation/virt/kvm/ |
| D | api.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation 13 - System ioctls: These query and set global attributes which affect the 17 - VM ioctls: These query and set attributes that affect an entire virtual 24 - vcpu ioctls: These query and set attributes that control the operation 32 - device ioctls: These query and set attributes that control the operation 80 facility that allows backward-compatible extensions to the API to be 104 the ioctl returns -ENOTTY. 122 ----------------------- 139 ----------------- [all …]
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