Searched full:primary (Results 1 – 25 of 220) sorted by relevance
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| /Documentation/virt/ |
| D | ne_overview.rst | 16 application then runs in a separate VM than the primary VM, namely an enclave.
24 carved out of the primary VM. Each enclave is mapped to a process running in the
25 primary VM, that communicates with the NE kernel driver via an ioctl interface.
29 1. An enclave abstraction process - a user space process running in the primary
33 There is a NE emulated PCI device exposed to the primary VM. The driver for this
39 hypervisor running on the host where the primary VM is running. The Nitro
42 2. The enclave itself - a VM running on the same host as the primary VM that
43 spawned it. Memory and CPUs are carved out of the primary VM and are dedicated
46 The memory regions carved out of the primary VM and given to an enclave need to
53 available for the primary VM. A CPU pool has to be set for NE purposes by an
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| /Documentation/admin-guide/blockdev/drbd/ |
| D | peer-states-8.dot | 2 Secondary -> Primary [ label = "recv state packet" ]
3 Primary -> Secondary [ label = "recv state packet" ]
4 Primary -> Unknown [ label = "connection lost" ]
6 Unknown -> Primary [ label = "connected" ]
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| /Documentation/userspace-api/media/v4l/ |
| D | ext-ctrls-colorimetry.rst | 65 primary component c of the mastering display in increments of 0.00002.
68 primary, c equal to 1 corresponds to Blue primary and c equal to 2
69 corresponds to the Red color primary.
73 primary component c of the mastering display in increments of 0.00002.
76 primary, c equal to 1 corresponds to Blue primary and c equal to 2
77 corresponds to Red color primary.
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| D | vidioc-g-tuner.rst | 249 - Reception of the primary language of a bilingual audio program is
251 transmitting the primary language monaural on the main audio
264 transmissions of a primary language, and an independent third
316 - The tuner receives the primary language of a bilingual audio
350 bilingual or SAP signal this mode selects the primary language.
355 primary language is played on both channels.
364 - Play the primary language, mono or stereo. Only
383 - Play the primary language on the left channel, the secondary
462 future drivers should produce only the primary language in this mode.
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| /Documentation/security/tpm/ |
| D | tpm-security.rst | 88 The mechanism chosen for the Linux Kernel is to derive the primary
102 certifying the null seed primary with that key) which is too complex
103 to run within the kernel, so we keep a copy of the null primary key
106 that if the null primary key certifies correctly, you know all your
114 In the current null primary scenario, the TPM must be completely
137 kernel must be created using the null primary key as the salt key
139 derivation. Thus, the kernel creates the null primary key once (as a
150 For every in-kernel operation we use null primary salted HMAC to
155 Null Primary Key Certification in Userspace
159 primary endorsement key. This document assumes that the Elliptic
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| /Documentation/gpu/amdgpu/display/ |
| D | mpo-overview.rst | 31 * ``DRM_PLANE_TYPE_PRIMARY``: Primary planes represent a "main" plane for a
32 CRTC, primary planes are the planes operated upon by CRTC modesetting and
36 * ``DRM_PLANE_TYPE_OVERLAY``: Overlay planes represent all non-primary,
43 * 4 Primary planes (1 per CRTC).
55 A typical MPO configuration from userspace - 1 primary + 1 overlay on a single
58 At least 1 pipe must be used per plane (primary and overlay), so for this
80 * Only primary planes have color-space and non-RGB format support
111 Video playback should be done using the "primary plane as underlay" MPO
114 * 1 YUV DRM Primary Plane (e.g. NV12 Video)
118 - Primary plane contains one or more videos
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| /Documentation/arch/sparc/oradax/ |
| D | dax-hv-api.txt | 162 0b'11 Primary context virtual address
167 0b'011 Primary context virtual address
183 0b'011 Primary context virtual address
188 [4:2] Primary source address type
192 0b'011 Primary context virtual address
201 0b'11 Primary context virtual address
247 …require multiple data streams for processing, requiring the specification of both primary data for…
250 36.2.1.1.1. Primary Input Format
252 …The primary input format code is a 4-bit field when it is used. There are 10 primary input formats…
301 36.2.1.1.2. Primary Input Element Size
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| /Documentation/devicetree/bindings/net/can/ |
| D | st,stm32-bxcan.yaml | 22 st,can-primary:
24 Primary mode of the bxCAN peripheral is only relevant if the chip has
29 uses the terms master instead of primary.
69 SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2
94 st,can-primary;
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pamu.txt | 57 - fsl,primary-cache-geometry
59 Two cells that specify the geometry of the primary PAMU
107 fsl,primary-cache-geometry = <32 1>;
113 fsl,primary-cache-geometry = <32 1>;
119 fsl,primary-cache-geometry = <32 1>;
125 fsl,primary-cache-geometry = <32 1>;
131 fsl,primary-cache-geometry = <32 1>;
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| D | msi-pic.txt | 94 In the PAMU, each PCI controller is given only one primary window. The
96 Because PCI devices must be able to DMA to memory, the primary window must
99 PAMU primary windows can be divided into 256 subwindows, and each
107 primary window used for memory, but mapped to the MSIR block (where MSIIR
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | snps,dw-apb-ictl.txt | 5 APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
16 - interrupts: interrupt reference to primary interrupt controller
37 /* dw_apb_ictl is used as primary interrupt controller */
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| D | marvell,armada-8k-pic.txt | 6 typically connected to the GIC as the primary interrupt controller.
14 - interrupts: the interrupt to the primary interrupt controller,
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | lontium,lt9211.yaml | 41 Primary MIPI DSI port-1 for MIPI input or
48 for LVDS input. Used in combination with primary
54 Primary MIPI DSI port-1 for MIPI output or
61 for LVDS output. Used in combination with primary
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| D | lontium,lt9611.yaml | 47 Primary MIPI port-1 for MIPI input
53 with primary MIPI port-1 to drive higher resolution displays
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| /Documentation/devicetree/bindings/media/ |
| D | renesas,drif.yaml | 38 two, one of them needs to act as a primary device that accepts common
40 property called "renesas,primary-bond".
44 the zeroth channel is selected as primary-bond. This channels accepts
47 "renesas,bonding" or "renesas,primary-bond" will have no effect. That
93 renesas,primary-bond:
96 Indicates that the channel acts as primary among the bonded channels.
134 - renesas,primary-bond
188 renesas,primary-bond;
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | st-rproc.txt | 6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
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| /Documentation/devicetree/bindings/mfd/ |
| D | ti,tps6594.yaml | 30 ti,primary-pmic:
33 Identify the primary PMIC on SPMI bus.
36 accomplished through a SPMI bus: the primary PMIC is the controller
117 ti,primary-pmic;
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| /Documentation/arch/powerpc/ |
| D | associativity.rst | 39 { primary domainID index, secondary domainID index, tertiary domainID index.. }
41 Linux kernel uses the domainID at the primary domainID index as the NUMA node id.
50 thereby making the node distance computation flexible. Form 2 also allows flexible primary
52 "ibm,associativity-reference-points" property, Form 2 allows a large number of primary domain
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| /Documentation/usb/ |
| D | dwc3.rst | 29 - primary handler of the device
37 - primary handler of the EP-interrupt
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| /Documentation/devicetree/bindings/mailbox/ |
| D | qcom,apcs-kpss-global.yaml | 101 - description: primary pll parent of the clock driver
118 - description: primary pll parent of the clock driver
138 - description: primary pll parent of the clock driver
156 - description: primary pll parent of the clock driver
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-sc8280xp.yaml | 32 - description: Primary USB SuperSpeed pipe clock
38 - description: Primary USB4 RX0 clock
39 - description: Primary USB4 RX1 clock
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| /Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-gr3d.yaml | 113 - description: primary module clock
123 - description: primary module reset
125 - description: primary memory client hotflush reset
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| /Documentation/arch/s390/ |
| D | qeth.rst | 12 a primary or a secondary Bridge Port. For more information, see
24 ROLE={primary|secondary|none}
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| /Documentation/PCI/endpoint/ |
| D | pci-ntb-howto.rst | 68 cache_line_size interrupt_pin msix_interrupts primary
112 connected to the two hosts. Use the 'primary' and 'secondary' entries
114 primary interface and the other PCI endpoint controller to the secondary
117 # ln -s controllers/2900000.pcie-ep/ functions/pci-epf-ntb/func1/primary
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| D | pci-endpoint-cfs.rst | 73 ... primary/
79 Non-transparent bridge), symlink of endpoint controller connected to primary
80 interface should be added in 'primary' directory and symlink of endpoint
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