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/Documentation/devicetree/bindings/fpga/
Dlattice,sysconfig.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Georgiev <v.georgiev@metrotek.ru>
23 - lattice,sysconfig-ecp5
28 program-gpios:
34 init-gpios:
40 done-gpios:
47 - compatible
48 - reg
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/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
30 -------
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Dgpio.txt4 1) gpios property
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
9 for compatibility reasons (resolving to the "gpios" property), it is not allowed
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
15 cases should they contain more than one. If your device uses several GPIOs with
17 meaningful name. The only case where an array of GPIOs is accepted is when
18 several GPIOs serve the same function (e.g. a parallel data line).
20 The exact purpose of each gpios property must be documented in the device tree
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/Documentation/devicetree/bindings/net/
Dsmsc,lan9115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
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Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-mac-address:
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
29 program; should be used in cases where the MAC address assigned
30 to the device by the boot program is different from the
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/Documentation/misc-devices/
Dc2port.rst1 .. SPDX-License-Identifier: GPL-2.0
10 This program is free software; you can redistribute it and/or modify
15 This program is distributed in the hope that it will be useful,
23 --------
26 C2 Interface used for in-system programming of micro controllers.
28 By using this driver you can reprogram the in-system flash without EC2
30 where the micro controller is connected via special GPIOs pins.
33 ----------
38 - AN127: FLASH Programming via the C2 Interface at
41 - C2 Specification at
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/Documentation/devicetree/bindings/leds/backlight/
Dti,lm3509.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrick Gansterer <paroga@paroga.com>
23 "#address-cells":
26 "#size-cells":
29 reset-gpios:
32 ti,brightness-rate-of-change-us:
36 ti,oled-mode:
49 The control register that is used to program the two current sinks.
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Dlm3630a-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lm3630a-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI LM3630A High-Efficiency Dual-String White LED
10 - Lee Jones <lee@kernel.org>
11 - Daniel Thompson <daniel.thompson@linaro.org>
12 - Jingoo Han <jingoohan1@gmail.com>
15 The LM3630A is a current-mode boost converter which supplies the power and
26 '#address-cells':
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/Documentation/driver-api/
Dptp.rst1 .. SPDX-License-Identifier: GPL-2.0
18 - Set time
19 - Get time
20 - Shift the clock by a given offset atomically
21 - Adjust clock frequency
24 - Time stamp external events
25 - Period output signals configurable from user space
26 - Low Pass Filter (LPF) access from user space
27 - Synchronization of the Linux system time via the PPS subsystem
54 ioctls. A program may query, enable, configure, and disable the
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Dpps.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PPS - Pulse Per Second
9 This program is free software; you can redistribute it and/or modify
14 This program is distributed in the hope that it will be useful,
22 --------
32 Carrier Detect pin) or to a parallel port (ACK-pin) or to a special
33 CPU's GPIOs (this is the common case in embedded systems) but in each
37 Common use is the combination of the NTPD as userland program, with a
38 GPS receiver as PPS source, to obtain a wallclock-time with
39 sub-millisecond synchronisation to UTC.
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