Searched full:programmed (Results 1 – 25 of 167) sorted by relevance
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| /Documentation/devicetree/bindings/input/ |
| D | ti,drv260x.yaml | 46 These are ROM based waveforms pre-programmed into the IC.
50 DRV260X_LIB_EMPTY - Do not use a pre-programmed library
51 DRV260X_ERM_LIB_A - Pre-programmed Library
52 DRV260X_ERM_LIB_B - Pre-programmed Library
53 DRV260X_ERM_LIB_C - Pre-programmed Library
54 DRV260X_ERM_LIB_D - Pre-programmed Library
55 DRV260X_ERM_LIB_E - Pre-programmed Library
56 DRV260X_ERM_LIB_F - Pre-programmed Library
57 DRV260X_LIB_LRA - Pre-programmed LRA Library
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-intel-m10-bmc-sec-update | 6 region if one is programmed, else it returns the
7 string: "hash not programmed". This file is only
16 reconfiguration region if one is programmed, else it
17 returns the string: "hash not programmed". This file
26 if one is programmed, else it returns the string:
27 "hash not programmed". This file is only visible if the
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| D | sysfs-platform-silicom | 29 0 - not programmed.
30 1 - programmed.
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| D | sysfs-driver-tegra-fuse | 6 data programmed at the factory. The data is laid out in 32bit
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| /Documentation/devicetree/bindings/nvmem/ |
| D | st,stm32-romem.yaml | 7 title: STMicroelectronics STM32 Factory-programmed data
10 This represents STM32 Factory-programmed read only non-volatile area: locked
42 This property explicits a factory programmed area that both secure
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| /Documentation/devicetree/bindings/power/supply/ |
| D | richtek,rt5033-charger.yaml | 28 to 650 mA programmed by I2C per 100 mA.
32 to 2000 mA programmed by I2C per 100 mA.
42 current. Its levels are 2.3 V to 3.8 V programmed by I2C per 0.1 V.
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| /Documentation/misc-devices/ |
| D | spear-pcie-gadget.rst | 44 vendor_id returns programmed vendor id (hex)
45 device_id returns programmed device id(hex)
58 INTA, MSI or NO_INT). Select MSI only when you have programmed
63 vendor_id write vendor id(hex) to be programmed.
64 device_id write device id(hex) to be programmed.
102 check for programmed bar0 size::
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| D | ad525x_dpot.rst | 9 settings. Access to the factory programmed tolerance is also provided, but
23 The tolerance files are the read-only factory programmed tolerance settings
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| /Documentation/hwmon/ |
| D | g760a.rst | 22 The fan speed is programmed by setting the period via 'pwm1' of two
35 speed differs more than 20% with respect to the programmed fan speed;
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| D | ina209.rst | 84 register is programmed correctly before they are used. Normally this is expected
89 programmed (ie has a value not equal to zero). If so, this value is retained.
91 programmed into the calibration register.
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| D | g762.rst | 45 of the programmed value for over 6 seconds 'fan1_alarm' is
64 the fan speed is programmed by setting a value between 0 and 255 via 'pwm1'
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-pinctrl.yaml | 42 programmed into hardware.
45 the idle pinctrl state will be programmed into hardware.
47 If an idle state is not defined, the most recently used pinctrl state will be left programmed
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| /Documentation/trace/coresight/ |
| D | coresight-config.rst | 17 Many CoreSight components can be programmed in complex ways - especially ETMs.
43 and efficient for the feature to be programmed onto the device when required.
47 will be programmed into the device hardware.
56 feature being enabled that can adjust the behaviour of the operation programmed
59 For example, this could be a count value in a programmed operation that repeats
125 In this case 'strobing' is enabled & programmed into the ETMv4.
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| /Documentation/devicetree/bindings/fpga/ |
| D | fpga-region.yaml | 39 * The entire FPGA is programmed.
66 * FPGA Bridges should be disabled while the FPGA is being programmed to
145 Region, the FPGA already has been programmed. A DTO that targets an FPGA Region
195 In this case, the FPGA will have one or more PRR's that may be programmed
239 mode after the region has been programmed.
256 that the FPGA has already been programmed with this image.
285 become disabled before the region has been programmed.
290 become enabled after the region has been programmed.
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | mux.txt | 9 as they are programmed into the register. E.g:
20 Some clock controller IPs do not allow a value of zero to be programmed
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| /Documentation/devicetree/bindings/pwm/ |
| D | microchip,corepwm.yaml | 43 mode is possible for each channel, and is set by the bitstream programmed to the
60 core, set at instantiation and by the bitstream programmed to the FPGA, determines
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| /Documentation/devicetree/bindings/mtd/ |
| D | mtd.yaml | 58 memory whose content can either be programmed by a user or is already
59 pre-programmed by the factory. Some flashes might provide both.
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| /Documentation/devicetree/bindings/clock/ |
| D | silabs,si5341.txt | 21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
28 still be programmed into the chip and the driver will leave them "as is".
56 If these are not specified, and the PLL is not yet programmed when the driver
119 silabs,reprogram; /* Chips are not programmed, always reset */
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| /Documentation/power/ |
| D | power_supply_class.rst | 154 constant charge current programmed by charger.
161 constant charge voltage programmed by charger.
166 input current limit programmed by charger. Indicates
169 input voltage limit programmed by charger. Indicates
172 input power limit programmed by charger. Indicates
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| /Documentation/devicetree/bindings/timer/ |
| D | jcore,pit.txt | 13 assignment to be programmed by software, but this property is
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| D | snps,arc-timer.txt | 3 - Can be optionally programmed to interrupt on Limit
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| /Documentation/i2c/busses/ |
| D | i2c-amd-mp2.rst | 18 The MP2 is an ARM processor programmed as an I2C controller and communicating
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| /Documentation/devicetree/bindings/hwmon/ |
| D | ti,ina3221.yaml | 66 compare the combined sum to the programmed limit. The Shunt-Voltage
67 Sum Limit register contains the programmed value that is compared
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | calxeda-ddr-ctrlr.yaml | 10 The Calxeda DDR memory controller is initialised and programmed by the
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| /Documentation/leds/ |
| D | well-known-leds.txt | 23 The "player LEDs" are then programmed with a pattern to indicate a particular
24 player. For example, a game controller with 4 LEDs, may be programmed with "x---"
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