Searched full:pulses (Results 1 – 25 of 36) sorted by relevance
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,axi-fan-control.yaml | 33 pulses-per-revolution:
35 Value specifying the number of pulses per revolution of the controlled
45 - pulses-per-revolution
60 pulses-per-revolution = <2>;
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| D | pwm-fan.yaml | 34 pulses-per-revolution:
36 Define the number of pulses per fan revolution for each tachometer
96 pulses-per-revolution = <2>;
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| D | maxim,max6639.yaml | 78 pulses-per-revolution = <2>;
86 pulses-per-revolution = <2>;
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| D | fan-common.yaml | 26 pulses-per-revolution:
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| /Documentation/input/devices/ |
| D | walkera0701.rst | 20 pulses from processor to HF part can be found at pin 2 of this connector,
22 modulation pulses to PC, signal pulses must be amplified.
62 Signal pulses
98 (Warning, pulses on ACK are inverted by transistor, irq is raised up on sync
105 values can be sampled between sync pulses.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-timer-stm32 | 37 OC4REF rising or falling edges generate pulses.
39 OC6REF rising or falling edges generate pulses.
41 OC4REF or OC6REF rising edges generate pulses.
44 pulses.
46 OC5REF or OC6REF rising edges generate pulses.
49 pulses.
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| D | sysfs-bus-counter | 119 by two on succeeding clock pulses. When the count
126 two on succeeding clock pulses. One clock pulse after
129 Succeeding clock pulses decrement the count by two. When
334 attribute indicates the value in nanoseconds where noise pulses
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| /Documentation/hwmon/ |
| D | g762.rst | 18 hardware characteristics of the system (reference clock, pulses per
36 number of pulses per fan revolution. Supported values
71 system: a reference clock source frequency, a number of pulses per fan
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| D | aquacomputer_d5next.rst | 50 and current. Flow sensor pulses are also available.
54 voltage and current. Flow sensor pulses are also available.
102 fan5_pulses Quadro flow sensor pulses
103 fan9_pulses Octo flow sensor pulses
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| D | g760a.rst | 23 consecutive speed pulses. The period is defined in terms of clock
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| D | sl28cpld.rst | 35 fan1_input Fan RPM. Assuming 2 pulses per revolution.
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| D | nsa320.rst | 55 is reduced from 100 us to less than 15 us then data pulses are likely to be
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| D | amc6821.rst | 50 fan1_pulses rw Pulses per revolution can be either 2 or 4.
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| D | dme1737.rst | 163 to the number of pulses per fan revolution that the connected tachometer
165 that generate 2 pulses per revolution. Fan inputs 5-6 also provide a max
296 number of pulses per revolution that
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| /Documentation/admin-guide/media/ |
| D | mgb4.rst | 98 The type of VSYNC pulses as detected by the video format detector.
108 The type of HSYNC pulses as detected by the video format detector.
119 HSYNC pulses, these must be generated internally in the FPGA to achieve
126 HSYNC pulses, these must be generated internally in the FPGA to achieve
154 Number of PCLK pulses between deassertion of the HSYNC signal and the first
161 Number of PCLK pulses between the end of the last valid pixel in the video
273 Number of PCLK pulses between deassertion of the HSYNC signal and the first
277 Number of PCLK pulses between the end of the last valid pixel in the video
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| /Documentation/userspace-api/media/rc/ |
| D | lirc-set-send-carrier.rst | 34 Set send carrier used to modulate IR PWM pulses and spaces.
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| D | lirc-set-rec-carrier.rst | 34 Set receive carrier used to modulate IR PWM pulses and spaces.
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| D | lirc-write.rst | 48 the chardev is a pulse/space sequence of integer values. Pulses and spaces
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | kinetic,ktd253.yaml | 16 using pulses on the enable wire. This is sometimes referred to as
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| /Documentation/devicetree/bindings/sound/ |
| D | awinic,aw8738.yaml | 32 description: Operation mode (number of pulses for one-wire pulse control)
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | fsl,cpm1-tsa.yaml | 106 Frame sync pulses are sampled with the rising edge of the channel
107 clock. If 'fsync-rising-edge' is not present, pulses are sampled with
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| D | fsl,qe-tsa.yaml | 106 Frame sync pulses are sampled with the rising edge of the channel
107 clock. If not present, pulses are sampled with the falling edge.
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| /Documentation/devicetree/bindings/clock/ |
| D | cirrus,cs2000-cp.yaml | 53 has missing pulses for up to 20 ms.
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| /Documentation/i2c/ |
| D | gpio-fault-injection.rst | 81 register 0x00 (if it has registers) when further clock pulses happen on SCL.
82 This is why bus recovery (up to 9 clock pulses) must either check SDA or send
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| /Documentation/driver-api/ |
| D | reset.rst | 42 carefully timed sequence of pulses on multiple reset lines.
61 trigger reset pulses, or to query reset line status.
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