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/Documentation/devicetree/bindings/rtc/
Disil,isl12026.txt14 - "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
17 - "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
26 isil,pwr-bsw = <0>;
27 isil,pwr-sbib = <1>;
/Documentation/devicetree/bindings/regulator/
Dst,stm32mp1-pwr-reg.yaml4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
7 title: STM32MP1 PWR voltage regulators
16 - const: st,stm32mp1,pwr-reg
18 - const: st,stm32mp13-pwr-reg
19 - const: st,stm32mp1,pwr-reg
44 pwr@50001000 {
45 compatible = "st,stm32mp1,pwr-reg";
/Documentation/devicetree/bindings/ata/
Dahci-st.txt17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
32 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
/Documentation/devicetree/bindings/soc/tegra/
Dnvidia,tegra20-pmc.yaml72 nvidia,cpu-pwr-good-en:
87 nvidia,cpu-pwr-good-time:
91 nvidia,cpu-pwr-off-time:
95 nvidia,core-pwr-good-time:
102 nvidia,core-pwr-off-time:
368 nvidia,suspend-mode: ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"]
369 nvidia,core-pwr-off-time: ["nvidia,core-pwr-good-time"]
370 nvidia,cpu-pwr-off-time: ["nvidia,cpu-pwr-good-time"]
388 nvidia,cpu-pwr-good-time = <0>;
389 nvidia,cpu-pwr-off-time = <0>;
[all …]
/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt25 - pwr
54 clock-names = "gpu", "pwr";
72 clock-names = "gpu", "pwr", "ref";
89 clock-names = "gpu", "pwr";
108 clock-names = "gpu", "pwr", "fuse";
/Documentation/devicetree/bindings/pinctrl/
Dbrcm,iproc-gpio.txt84 pwr: pwr {
114 gpio-pwr = <&gpio_ccm 0 0>;
Dmarvell,dove-pinctrl.txt68 cpu-pwr-down Pin is used for CPU_PWRDWN
69 standby-pwr-down Pin is used for STBY_PWRDWN
70 core-pwr-good Pin is used for CORE_PWR_GOOD (Pins 0-7 only)
71 cpu-pwr-good Pin is used for CPU_PWR_GOOD (Pins 8-15 only)
Dbrcm,nsp-gpio.txt75 pwr: pwr {
/Documentation/devicetree/bindings/pci/
Drcar-gen4-pci-ep.yaml63 - const: pwr
113 reset-names = "pwr";
Drcar-gen4-pci-host.yaml64 - const: pwr
112 reset-names = "pwr";
Dbaikal,bt1-pcie.yaml90 - const: pwr
160 reset-names = "mstr", "slv", "pwr", "hot", "phy", "core", "pipe",
Dnvidia,tegra194-pcie-ep.yaml155 nvidia,aspm-pwr-on-t-us:
243 nvidia,aspm-pwr-on-t-us = <20>;
299 nvidia,aspm-pwr-on-t-us = <20>;
Dqcom,pcie.yaml314 - const: pwr # PWR reset
429 - const: pwr # PWR reset
Dnvidia,tegra194-pcie.yaml170 nvidia,aspm-pwr-on-t-us:
302 nvidia,aspm-pwr-on-t-us = <20>;
366 nvidia,aspm-pwr-on-t-us = <20>;
Drockchip-dw-pcie-common.yaml108 - const: pwr
Drockchip-dw-pcie-ep.yaml92 reset-names = "pwr", "pipe";
/Documentation/devicetree/bindings/display/connector/
Ddp-connector.yaml27 dp-pwr-supply:
Dhdmi-connector.yaml39 hdmi-pwr-supply:
/Documentation/devicetree/bindings/arm/stm32/
Dst,stm32-syscon.yaml22 - st,stm32mp151-pwr-mcu
/Documentation/devicetree/bindings/mailbox/
Dmailbox.txt35 mbox-names = "pwr-ctrl", "rpc";
/Documentation/devicetree/bindings/leds/
Dleds-lp55xx.yaml54 pwr-sel:
163 pwr-sel: false
186 pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
/Documentation/devicetree/bindings/mfd/
Dsilergy,sy7636a.yaml30 epd-pwr-good-gpios:
/Documentation/networking/
Dradiotap-headers.rst107 int pkt_rate_100kHz = 0, antenna = 0, pwr = 0;
140 pwr = *iterator.this_arg;
/Documentation/devicetree/bindings/sound/
Dcs42l56.txt38 - cirrus,adaptive-pwr-cfg : Configures how the power to the Headphone and Lineout
/Documentation/devicetree/bindings/usb/
Dfsl,usb2.yaml56 fsl,invert-pwr-fault:

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