Searched full:qspi (Results 1 – 25 of 29) sorted by relevance
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| /Documentation/devicetree/bindings/spi/ |
| D | cdns,qspi-nor.yaml | 4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
26 const: starfive,jh7110-qspi
37 enum: [ qspi, qspi-ocp, rstc_ref ]
48 enum: [ qspi, qspi-ocp ]
53 const: amd,pensando-elba-qspi
70 - amd,pensando-elba-qspi
71 - intel,lgm-qspi
72 - intel,socfpga-qspi
74 - starfive,jh7110-qspi
76 - ti,k2g-qspi
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| D | fsl,spi-fsl-qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml#
19 - fsl,vf610-qspi
20 - fsl,imx6sx-qspi
21 - fsl,imx7d-qspi
22 - fsl,imx6ul-qspi
23 - fsl,ls1021a-qspi
24 - fsl,ls2080a-qspi
27 - fsl,ls1043a-qspi
28 - const: fsl,ls1021a-qspi
31 - fsl,imx8mq-qspi
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| D | qcom,spi-qcom-qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#
7 title: Qualcomm Quad Serial Peripheral Interface (QSPI)
12 description: The QSPI controller allows SPI protocol communication in single,
23 - qcom,sc7180-qspi
24 - qcom,sc7280-qspi
25 - qcom,sdm845-qspi
27 - const: qcom,qspi-v1
46 - description: QSPI core clock
55 - const: qspi-config
56 - const: qspi-memory
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| D | renesas,rspi.yaml | 7 title: Renesas (Quad) Serial Peripheral Interface (RSPI/QSPI)
31 - renesas,qspi-r8a7742 # RZ/G1H
32 - renesas,qspi-r8a7743 # RZ/G1M
33 - renesas,qspi-r8a7744 # RZ/G1N
34 - renesas,qspi-r8a7745 # RZ/G1E
35 - renesas,qspi-r8a77470 # RZ/G1C
36 - renesas,qspi-r8a7790 # R-Car H2
37 - renesas,qspi-r8a7791 # R-Car M2-W
38 - renesas,qspi-r8a7792 # R-Car V2H
39 - renesas,qspi-r8a7793 # R-Car M2-N
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| D | brcm,spi-bcm-qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml#
36 - brcm,spi-bcm7425-qspi
37 - brcm,spi-bcm7429-qspi
38 - brcm,spi-bcm7435-qspi
39 - brcm,spi-bcm7445-qspi
40 - brcm,spi-bcm7216-qspi
41 - brcm,spi-bcm7278-qspi
42 - const: brcm,spi-bcm-qspi
47 - brcm,spi-brcmstb-qspi
49 - brcm,spi-nsp-qspi
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| D | nvidia,tegra210-quad.yaml | 19 - nvidia,tegra210-qspi
20 - nvidia,tegra186-qspi
21 - nvidia,tegra194-qspi
22 - nvidia,tegra234-qspi
23 - nvidia,tegra241-qspi
33 - const: qspi
78 compatible = "nvidia,tegra210-qspi";
85 clock-names = "qspi", "qspi_out";
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| D | ti,qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/ti,qspi.yaml#
7 title: TI QSPI controller
18 - ti,am4372-qspi
19 - ti,dra7xxx-qspi
48 Name of the hwmod associated to the QSPI. This is for legacy
55 Handle to system control region containing QSPI chipselect register
83 compatible = "ti,dra7xxx-qspi";
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| D | xlnx,zynq-qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
7 title: Xilinx Zynq QSPI controller
10 The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
22 const: xlnx,zynq-qspi-1.0
52 compatible = "xlnx,zynq-qspi-1.0";
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| D | spi-zynqmp-qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#
18 - xlnx,versal-qspi-1.0
19 - xlnx,zynqmp-qspi-1.0
57 qspi: spi@ff0f0000 {
58 compatible = "xlnx,zynqmp-qspi-1.0";
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| D | st,stm32-qspi.yaml | 4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
7 title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI)
18 const: st,stm32f469-qspi
27 - const: qspi
68 compatible = "st,stm32f469-qspi";
70 reg-names = "qspi", "qspi_mm";
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| D | atmel,quadspi.yaml | 7 title: Atmel Quad Serial Peripheral Interface (QSPI)
18 - atmel,sama5d2-qspi
19 - microchip,sam9x60-qspi
20 - microchip,sama7g5-qspi
81 compatible = "atmel,sama5d2-qspi";
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| D | microchip,mpfs-spi.yaml | 10 SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/
21 - microchip,mpfs-qspi
22 - microchip,pic64gx-qspi
24 - const: microchip,coreqspi-rtl-v2 # FPGA QSPI
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| D | cdns,qspi-nor-peripheral-props.yaml | 4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml#
7 title: Peripheral-specific properties for the Cadence QSPI controller.
16 # cdns,qspi-nor.yaml
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| D | nvidia,tegra210-quad-peripheral-props.yaml | 18 QSPI to corresponding slave device.
27 QSPI to corresponding slave device.
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| /Documentation/devicetree/bindings/soc/microchip/ |
| D | microchip,mpfs-sys-controller.yaml | 32 The SPI flash connected to the system controller's QSPI controller.
35 for Auto Update. The MSS and system controller have separate QSPI
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| /Documentation/devicetree/bindings/edac/ |
| D | socfpga-eccmgr.txt | 117 QSPI FIFO ECC
119 - compatible : Should be "altr,socfpga-qspi-ecc"
121 - altr,ecc-parent : phandle to parent QSPI node.
216 qspi-ecc@ff8c8400 {
217 compatible = "altr,socfpga-qspi-ecc";
219 altr,ecc-parent = <&qspi>;
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| /Documentation/arch/arm/stm32/ |
| D | stm32mp13-overview.rst | 20 - QSPI
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| D | stm32mp151-overview.rst | 20 - QSPI
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| D | stm32h743-overview.rst | 14 - Dual mode QSPI
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| D | stm32h750-overview.rst | 14 - Dual mode QSPI
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| D | stm32f746-overview.rst | 14 - Dual mode QSPI
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| D | stm32f769-overview.rst | 14 - Dual mode QSPI
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| /Documentation/devicetree/bindings/reset/ |
| D | zynq-reset.txt | 57 385: qspi ref reset
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | brcm,cygnus-pinmux.txt | 109 "qspi": "qspi_0_grp", "qspi_1_grp"
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| /Documentation/devicetree/bindings/firmware/ |
| D | intel,stratix10-svc.txt | 17 the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
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