| /Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt8365-pinctrl.yaml | 78 description: Pull up R1/R0 type define value.
80 For pull up type is normal, it don't need add R1/R0 define.
81 For pull up type is R1/R0 type, it can add value to set different
83 100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
84 101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
85 102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
86 103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
92 description: Pull down R1/R0 type define value.
94 For pull down type is normal, it don't need add R1/R0 define.
95 For pull down type is R1/R0 type, it can add value to set
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| D | mediatek,mt6795-pinctrl.yaml | 101 description: mt6795 pull down PUPD/R0/R1 type define value.
104 values; When pull down type is PUPD/R0/R1, adding R1R0 defines
111 description: mt6795 pull up PUPD/R0/R1 type define value.
114 values; When pull up type is PUPD/R0/R1, adding R1R0 defines will
133 Pull up settings for 2 pull resistors, R0 and R1. User can
136 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
137 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
138 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
139 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
145 Pull down settings for 2 pull resistors, R0 and R1. User can
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| D | mediatek,mt6779-pinctrl.yaml | 162 Pull up settings for 2 pull resistors, R0 and R1. User can
165 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
166 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
167 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
168 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
174 Pull down settings for 2 pull resistors, R0 and R1. User can
177 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
178 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
179 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
180 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
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| D | mediatek,mt8183-pinctrl.yaml | 146 Pull up settings for 2 pull resistors, R0 and R1. User can
149 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
150 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
151 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
152 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
158 Pull down settings for 2 pull resistors, R0 and R1. User can
161 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
162 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
163 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
164 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
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| D | mediatek,mt7986-pinctrl.yaml | 303 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
312 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
335 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments
337 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
338 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
339 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
340 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
347 Pull down settings for 2 pull resistors, R0 and R1. Valid arguments
349 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
350 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
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| D | mediatek,mt7981-pinctrl.yaml | 357 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
366 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
389 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments
391 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
392 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
393 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
394 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
401 Pull down settings for 2 pull resistors, R0 and R1. Valid arguments
403 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
404 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
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| /Documentation/litmus-tests/locking/ |
| D | DCL-broken.litmus | 17 int r0;
21 r0 = READ_ONCE(*flag);
22 if (r0 == 0) {
36 int r0;
40 r0 = READ_ONCE(*flag);
41 if (r0 == 0) {
53 locations [flag;data;0:r0;0:r1;1:r0;1:r1]
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| D | DCL-fixed.litmus | 18 int r0;
22 r0 = smp_load_acquire(flag);
23 if (r0 == 0) {
37 int r0;
41 r0 = smp_load_acquire(flag);
42 if (r0 == 0) {
54 locations [flag;data;0:r0;0:r1;1:r0;1:r1]
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| D | RM-broken.litmus | 28 int r0;
33 r0 = READ_ONCE(*x);
39 locations [x;0:r2;1:r0;1:r1;1:r2]
40 filter (1:r0=0 /\ 1:r1=1)
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| D | RM-fixed.litmus | 28 int r0;
32 r0 = READ_ONCE(*x);
39 locations [x;0:r2;1:r0;1:r1;1:r2]
40 filter (1:r0=0 /\ 1:r1=1)
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| /Documentation/litmus-tests/atomic/ |
| D | cmpxchg-fail-ordered-1.litmus | 14 int r0;
20 r0 = READ_ONCE(*y);
25 int r0;
31 r0 = READ_ONCE(*x);
35 exists (0:r0=0 /\ 1:r0=0)
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| D | cmpxchg-fail-unordered-1.litmus | 15 int r0;
20 r0 = READ_ONCE(*y);
25 int r0;
30 r0 = READ_ONCE(*x);
34 exists (0:r0=0 /\ 1:r0=0)
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| D | Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus | 16 int r0;
19 r0 = READ_ONCE(*x);
32 (0:r0=1 /\ 0:r1=0)
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| /Documentation/litmus-tests/rcu/ |
| D | RCU+sync+free.litmus | 26 int *r0;
30 r0 = rcu_dereference(*y);
31 r1 = READ_ONCE(*r0);
42 exists (0:r0=x /\ 0:r1=0)
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| D | RCU+sync+read.litmus | 29 int r0;
32 r0 = READ_ONCE(*x);
37 exists (1:r0=1 /\ 1:r1=0)
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| /Documentation/translations/zh_TW/arch/arm/ |
| D | kernel_user_helpers.txt | 103 r0 = TLS 值
140 r0 = oldval
147 r0 = 成功代碼 (零或非零)
148 C flag = 如果 r0 == 0 則置 1，如果 r0 != 0 則清零。
234 r0 = 指向 oldval
241 r0 = 成功代碼 (零或非零)
242 C flag = 如果 r0 == 0 則置 1，如果 r0 != 0 則清零。
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| /Documentation/translations/zh_CN/arch/arm/ |
| D | kernel_user_helpers.txt | 103 r0 = TLS 值
140 r0 = oldval
147 r0 = 成功代码 (零或非零)
148 C flag = 如果 r0 == 0 则置 1，如果 r0 != 0 则清零。
234 r0 = 指向 oldval
241 r0 = 成功代码 (零或非零)
242 C flag = 如果 r0 == 0 则置 1，如果 r0 != 0 则清零。
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| /Documentation/virt/kvm/arm/ |
| D | hyp-abi.rst | 33 r0/x0 = HVC_SET_VECTORS
43 r0/x0 = HVC_RESET_VECTORS
51 r0/x0 = HVC_SOFT_RESTART
71 Any other value of r0/x0 triggers a hypervisor-specific handling,
74 The return value of a stub hypercall is held by r0/x0, and is 0 on
76 clobber any of the caller-saved registers (x0-x18 on arm64, r0-r3 and
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| D | mmio-guard.rst | 46 bytes (r0). KVM_FUNC_HAS_RANGE(1)
57 RET_SUCCESS(0) (r0)
72 RET_SUCCESS(0) (r0)
93 RET_SUCCESS(0) (r0)
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| /Documentation/bpf/ |
| D | verifier.rst | 27 bpf_mov R0 = R2
33 R0 has a return type of the function.
41 bpf_mov R0 = R6
65 bpf_ld R0 = *(u32 *)(R6 + 8)
67 intends to load a word from address R6 + 8 and store it into R0
81 bpf_ld R0 = *(u32 *)(R10 - 4)
93 After the call register R0 will be set to return type of the function.
220 6: r0 = *(u16 *)(r3 +12) /* access 12 and 13 bytes of the packet */
238 R0=inv1 R1=ctx R3=pkt(id=0,off=0,r=14) R4=pkt_end R5=pkt(id=0,off=14,r=14) R10=fp
239 6: r0 = *(u8 *)(r3 +7) /* load 7th byte from the packet */
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| D | classic_vs_extended.rst | 30 R0 - R5 are scratch registers and eBPF program needs spill/fill them if
74 After an in-kernel function call, R1 - R5 are reset to unreadable and R0 has
118 R0 - rax
141 bpf_mov R7, R0 /* save foo() return value */
148 bpf_add R0, R7
186 registers and place their return value into ``%rax`` which is R0 in eBPF.
188 interpreter. R0-R5 are scratch registers, so eBPF program needs to preserve
195 bpf_mov R0, R1
340 value into register R0 before doing a BPF_EXIT. Class 6 in eBPF is used as
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| /Documentation/arch/arm/ |
| D | kernel_user_helpers.rst | 91 r0 = TLS value
127 r0 = oldval
134 r0 = success code (zero or non-zero)
135 C flag = set if r0 == 0, clear if r0 != 0
219 r0 = pointer to oldval
226 r0 = success code (zero or non-zero)
227 C flag = set if r0 == 0, clear if r0 != 0
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| /Documentation/bpf/standardization/ |
| D | abi.rst | 19 * R0: return value from function calls, and exit value for BPF programs
24 R0 - R5 are scratch registers and BPF programs needs to spill/fill them if
27 The BPF program needs to store the return value into register R0 before doing an
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| /Documentation/devicetree/bindings/iio/afe/ |
| D | temperature-sense-rtd.yaml | 24 R(T) = r0 * (1 + alpha * T)
25 T = 1 / (alpha * r0 * iexc) * (V - r0 * iexc)
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| /Documentation/arch/sh/ |
| D | register-banks.rst | 11 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
18 r0 ... r7 if SR.RB is set to the bank we are interested in, otherwise ldc/stc
|