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/Documentation/devicetree/bindings/serial/
Dnvidia,tegra20-hsuart.yaml61 List of entries providing percentage of baud rate adjustment within a range. Each entry
62 contains a set of 3 values: range low/high and adjusted rate. When the baud rate set on the
63 controller falls within the range mentioned in this field, the baud rate will be adjusted by
68 Increase baud rate by 2% when set baud rate falls within range 9600 to 115200.
70 Standard UART devices are expected to have tolerance for baud rate error by -4 to +4 %. All
72 issue. UART RX baud rate tolerance level is 0% to +4% in 1-stop config. Otherwise, the
74 baud rate to be higher than the deviations observed in TX.
77 valid range and Tegra baud rate has to be set above actual TX baud rate observed. To do this
82 Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART
Dserial-peripheral-props.yaml16 rate.
22 The maximum baud rate the device operates at.
31 The current baud rate the device operates at.
33 the baud rate of the slave device.
36 * the rate is setup by a bootloader and there is no way to reset
38 * device baud rate is configured by its firmware but there is no
/Documentation/networking/devlink/
Dnetdevsim.rst60 Rate objects
63 The ``netdevsim`` driver supports rate objects management, which includes:
65 - registerging/unregistering leaf rate objects per VF devlink port;
66 - creation/deletion node rate objects;
67 - setting tx_share and tx_max rate values for any rate object type;
68 - setting parent node for any rate object type.
70 Rate nodes and their parameters are exposed in ``netdevsim`` debugfs in RO mode.
71 For example created rate node with name ``some_group``:
/Documentation/scheduler/
Dsched-debug.rst14 high then the rate the kernel samples for NUMA hinting faults may be
28 In combination, the "scan delay" and "scan size" determine the scan rate.
29 When "scan delay" decreases, the scan rate increases. The scan delay and
30 hence the scan rate of every task is adaptive and depends on historical
33 the higher the "scan size", the higher the scan rate.
37 rate, the more quickly a tasks memory is migrated to a local node if the
44 rate for each task.
51 rate for each task.
/Documentation/devicetree/bindings/iio/adc/
Datmel,sama5d2-adc.yaml34 atmel,min-sample-rate-hz:
35 description: Minimum sampling rate, it depends on SoC.
37 atmel,max-sample-rate-hz:
38 description: Maximum sampling rate, it depends on SoC.
71 - atmel,min-sample-rate-hz
72 - atmel,max-sample-rate-hz
89 atmel,min-sample-rate-hz = <200000>;
90 atmel,max-sample-rate-hz = <20000000>;
Dmicrochip,pac1934.yaml40 A GPIO used to trigger a change is sampling rate (lowering the chip power
42 sampling rate is forced to eight samples/second. When it is forced low,
43 the sampling rate is 1024 samples/second unless a different sample rate
/Documentation/devicetree/bindings/w1/
Dw1-uart.yaml18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
21 The default baud-rate for reset and presence detection is 9600 and for
22 a 1-Wire read or write operation 115200. In case the actual baud-rate
35 The baud rate for the 1-Wire reset and presence detect.
40 The baud rate for the 1-Wire write-0 cycle.
45 The baud rate for the 1-Wire write-1 and read cycle.
/Documentation/devicetree/bindings/sound/
Ddavinci-evm-audio.txt14 - ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec.
17 - Either codec-clock-rate or the codec-clock reference has to be defined. If
19 defined rate and takes the rate from the clock reference.
36 ti,codec-clock-rate = <12000000>;
Dcs35l33.txt26 - cirrus,ramp-rate : On power up, it affects the time from when the power
32 60ms,100ms,175ms respectively for 48KHz sample rate.
57 cirrus,release-rate : The number of consecutive LRCLK periods before
83 - cirrus,vp-hg-rate : The rate (number of LRCLK periods) at which the VPhg is
108 cirrus,ramp-rate = <0x0>;
115 cirrus,release-rate = <0x3>;
121 cirrus,vp-hg-rate=<0x2>;
Dfsl,easrc.yaml7 title: NXP Asynchronous Sample Rate Converter (ASRC) Controller
58 fsl,asrc-rate:
62 description: Defines a mutual sample rate used by DPCM Back Ends
80 - fsl,asrc-rate
104 fsl,asrc-rate = <8000>;
Dfsl,imx-asrc.yaml7 title: Freescale Asynchronous Sample Rate Converter (ASRC) Controller
10 The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of
80 fsl,asrc-rate:
82 description: The mutual sample rate used by DPCM Back Ends
119 - fsl,asrc-rate
174 fsl,asrc-rate = <48000>;
/Documentation/userspace-api/media/v4l/
Dext-ctrls-image-process.rst28 .. _v4l2-cid-pixel-rate:
31 Pixel sampling rate in the device's pixel array. This control is
35 rate. The frame rate can be calculated from the pixel rate, analogue crop
36 rectangle as well as horizontal and vertical blanking. The pixel rate
40 The configuration of the frame rate is performed by selecting the desired
/Documentation/devicetree/bindings/net/
Dsff,sfp.yaml57 rate-select0-gpios:
60 GPIO phandle and a specifier of the Rx Signaling Rate Select (AKA RS0)
61 output gpio signal, low - low Rx rate, high - high Rx rate Must not be
64 rate-select1-gpios:
67 GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1)
68 output gpio signal (SFP+ only), low - low Tx rate, high - high Tx rate. Must
80 rate-select0-gpios: false
81 rate-select1-gpios: false
/Documentation/devicetree/bindings/media/i2c/
Ddongwoon,dw9768.yaml60 Indication of VCM internal clock dividing rate select, as one multiple
64 - 0 # Dividing Rate - 2
65 - 1 # Dividing Rate - 1
66 - 2 # Dividing Rate - 1/2
67 - 3 # Dividing Rate - 1/4
68 - 4 # Dividing Rate - 8
69 - 5 # Dividing Rate - 4
/Documentation/sound/cards/
Dimg-spdif-in.rst25 rates. The active rate can be obtained by reading the 'SPDIF In Lock Frequency'
28 When the value of this control is set to {0,0,0,0}, the rate given to hw_params
29 will determine the single rate the block will capture. Else, the rate given to
33 If less than four rates are required, the same rate can be specified more than
38 This control returns the active capture rate, or 0 if a lock has not been
/Documentation/ABI/testing/
Dsysfs-bus-intel_th-devices-pti21 - 0: Intel TH clock rate,
22 - 1: 1/2 Intel TH clock rate,
23 - 2: 1/4 Intel TH clock rate,
24 - 3: 1/8 Intel TH clock rate.
Dsysfs-bus-iio-filter-admv88188 - auto -> Adjust bandpass filter to track changes in input clock rate.
9 - manual -> disable/unregister the clock rate notifier / input clock tracking.
11 the clock rate notifier
Dsysfs-driver-hid-picolcd31 Description: Make it possible to adjust defio refresh rate.
34 the active refresh rate being enclosed in brackets ('[' and ']')
36 Writing: accepts new refresh rate expressed in integer Hz
42 to flush its tiny changes explicitly at higher than default rate.
/Documentation/misc-devices/
Doxsemi-tornado.rst10 The baud rate produced by the baud generator is obtained from this input
14 value from 1 to 65535. Finally a programmable oversampling rate is used
16 determine the actual baud rate used. Baud rates from 15625000bps down
19 By default the oversampling rate is set to 16 and the clock prescaler is
26 The oversampling rate is programmed with the TCR register and the clock
43 the requested rate (r), the actual rate yielded (a) and its deviation
44 from the requested rate (d), and the values of the oversampling rate
90 below 300bps become unavailable in the regular way, e.g. the rate of
93 used by encoding the values for, the prescaler, the oversampling rate
108 the baud rate of 38400bps. Note that the value of 0 in TCR sets the
[all …]
/Documentation/w1/masters/
Dw1-uart.rst21 combination of baud-rate and transmitted byte, which corresponds to a
25 the baud-rate 9600, i.e. 104.2 us per bit. The transmitted byte 0xf0 over
31 Similar for a 1-Wire read bit or write bit, which uses the baud-rate
36 The default baud-rate for reset and presence detection is 9600 and for
37 a 1-Wire read or write operation 115200. In case the actual baud-rate
/Documentation/devicetree/bindings/mtd/
Dspear_smi.txt9 - clock-rate : Functional clock rate of SMI in Hz
23 clock-rate = <50000000>; /* 50MHz */
/Documentation/userspace-api/media/drivers/
Dmax2175.rst41 sample clock (sck), sampling rate etc. These multiple settings are
52 - This configures FM band with a sample rate of 0.512 million
55 - This configures VHF band with a sample rate of 2.048 million
60 - This configures FM band with a sample rate of 0.7441875 million
63 - This configures FM band with a sample rate of 0.372 million
/Documentation/networking/device_drivers/ethernet/ti/
Dcpsw.rst30 potential incoming rate, thus, rate of all incoming tx queues has
38 maximum allowed 4, but only for 3 rate can be set.
181 // Check maximum rate of tx (cpdma) queues:
228 // Set rate for class A - 41 Mbit (tc0, txq0) using CBS Qdisc
238 // Set rate for class B - 21 Mbit (tc1, txq1) using CBS Qdisc:
280 Receiving data rate: 39012 kbps
281 Receiving data rate: 39012 kbps
282 Receiving data rate: 39012 kbps
283 Receiving data rate: 39012 kbps
284 Receiving data rate: 39012 kbps
[all …]
/Documentation/driver-api/media/
Dtx-rx.rst50 receiver the frequency of the bus (i.e. it is not the same as the symbol rate).
62 Pixel rate
65 The pixel rate on the bus is calculated as follows::
71 .. list-table:: variables in pixel rate calculation
90 The pixel rate calculated this way is **not** the same thing as the
91 pixel rate on the camera sensor's pixel array which is indicated by the
92 :ref:`V4L2_CID_PIXEL_RATE <v4l2-cid-pixel-rate>` control.
/Documentation/devicetree/bindings/pinctrl/
Dsophgo,cv1800-pinctrl.yaml48 enable/disable, input schmitt trigger, slew-rate, drive strength
80 slew-rate:
81 description: slew rate for output buffer (0 is fast, 1 is slow)
117 slew-rate = <0>;

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