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/Documentation/devicetree/bindings/misc/
Dolpc,xo1.75-ec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/misc/olpc,xo1.75-ec.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: OLPC XO-1.75 Embedded Controller
12 on a OLPC XO-1.75 laptop computer.
16 response data) by strobing the ACK pin with the ready signal. See the
17 "ready-gpios" property of the SSP binding as documented in:
18 <Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>.
21 - Lubomir Rintel <lkundrak@v3.sk>
[all …]
/Documentation/devicetree/bindings/net/
Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
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/Documentation/devicetree/bindings/spi/
Dmarvell,mmp2-ssp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
16 - marvell,mmp2-ssp
17 - mrvl,ce4100-ssp
18 - mvrl,pxa168-ssp
19 - mrvl,pxa25x-ssp
20 - mvrl,pxa25x-nssp
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/Documentation/devicetree/bindings/mtd/
Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
[all …]
Draw-nand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
32 Contains the chip-select IDs.
34 nand-ecc-placement:
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Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
21 read registers (tR). Required if property "gpios" is not used
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Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/Documentation/devicetree/bindings/iio/magnetometer/
Dasahi-kasei,ak8975.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8975.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Albrieux <jonathan.albrieux@gmail.com>
15 - enum:
16 - asahi-kasei,ak8975
17 - asahi-kasei,ak8963
18 - asahi-kasei,ak09911
19 - asahi-kasei,ak09912
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/Documentation/devicetree/bindings/net/can/
Dtcan4x5x.txt7 - compatible:
11 - reg: 0
12 - #address-cells: 1
13 - #size-cells: 0
14 - spi-max-frequency: Maximum frequency of the SPI bus the chip can
16 - interrupt-parent: the phandle to the interrupt controller which provides
18 - interrupts: interrupt specification for data-ready.
24 - reset-gpios: Hardwired output GPIO. If not defined then software
26 - device-state-gpios: Input GPIO that indicates if the device is in
29 - device-wake-gpios: Wake up GPIO to wake up the TCAN device. Not
[all …]
/Documentation/devicetree/bindings/fpga/
Dlattice,sysconfig.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Georgiev <v.georgiev@metrotek.ru>
23 - lattice,sysconfig-ecp5
28 program-gpios:
34 init-gpios:
37 Indicates that the FPGA is ready to be configured.
40 done-gpios:
47 - compatible
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/Documentation/devicetree/bindings/sound/
Dmaxim,max98357a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tzung-Bi Shih <tzungbi@kernel.org>
13 Maxim Integrated MAX98357A/MAX98360A is a digital pulse-code modulation (PCM)
17 - $ref: dai-common.yaml#
22 - maxim,max98357a
23 - maxim,max98360a
25 '#sound-dai-cells':
28 sdmode-gpios:
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/Documentation/devicetree/bindings/input/touchscreen/
Dfsl,imx6ul-tsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
11 - Shawn Guo <shawnguo@kernel.org>
12 - Sascha Hauer <s.hauer@pengutronix.de>
16 const: fsl,imx6ul-tsc
20 - description: touch controller address
21 - description: ADC2 address
[all …]
/Documentation/devicetree/bindings/iio/imu/
Dadi,adis16480.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <alexandru.tachici@analog.com>
15 - adi,adis16375
16 - adi,adis16480
17 - adi,adis16485
18 - adi,adis16488
19 - adi,adis16490
20 - adi,adis16495-1
[all …]
/Documentation/devicetree/bindings/firmware/
Dcznic,turris-omnia-mcu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/cznic,turris-omnia-mcu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Behún <kabel@kernel.org>
14 GPIOs, interrupts, watchdog, system power off and wakeup configuration.
18 const: cznic,turris-omnia-mcu
27 interrupt-controller: true
29 '#interrupt-cells':
38 0 - 15 0 0 - 15
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/Documentation/devicetree/bindings/iio/gyroscope/
Dnxp,fxas21002c.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rui Miguel Silva <rmfrfs@gmail.com>
14 http://www.nxp.com/products/sensors/gyroscopes/3-axis-digital-gyroscope:FXAS21002C
23 vdd-supply:
26 vddio-supply:
29 reset-gpios:
38 interrupt-names:
43 - INT1
[all …]
/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
[all …]
Dpanel-edp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
51 :<T1>:<T2>: :<--T10-->:<T11>:<T12>:
52 : +-----------------------+---------+---------+
53 eDP -----------+ Black video | Src vid | Blk vid +
[all …]
/Documentation/driver-api/gpio/
Ddrivers-on-gpio.rst6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
25 up to three buttons by simply using GPIOs and no mouse port. You can cut the
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
31 off/on, for an actual PWM waveform, see pwm-gpio below.)
[all …]
Ddriver.rst13 Internal Representation of GPIOs
26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
45 controller defining 128 GPIOs at a "base" of 32 ; while another platform uses
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
[all …]
/Documentation/driver-api/
Dpin-control.rst9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
30 be sparse - i.e. there may be gaps in the space with numbers where no
60 .. code-block:: c
97 See ``arch/arm/mach-ux500/Kconfig`` for an example.
[all …]
/Documentation/ABI/stable/
Dsysfs-driver-mlxreg-io1 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_health
6 0 - health failed, 2 - health OK, 3 - ASIC in booting state.
10 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld1_version
11 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld2_version
20 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/fan_dir
25 forward direction - relevant bit is set 0;
26 reversed direction - relevant bit is set 1.
30 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version
39 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_enable
48 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/select_iio
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