Searched +full:reg +full:- +full:property (Results 1 – 25 of 676) sorted by relevance
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| /Documentation/devicetree/bindings/ |
| D | resource-names.txt | 4 include a supplemental property for assigning names to each of the list
5 items. The names property consists of a list of strings in the same
6 order as the data in the resource property.
10 Resource Property Supplemental Names Property
11 ----------------- ---------------------------
12 reg reg-names
13 clocks clock-names
14 interrupts interrupt-names
18 The -names property must be used in conjunction with the normal resource
19 property. If not it will be ignored.
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| D | example-schema.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 # All the top-level keys are standard json-schema keywords except for
10 $id: http://devicetree.org/schemas/example-schema.yaml#
11 # $schema is the meta-schema this schema should be validated with.
12 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Rob Herring <robh@kernel.org>
20 A more detailed multi-line description of the binding.
44 - items:
45 # items is a list of possible values for the property. The number of
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| /Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 2 ---------------------------
5 format: <vendor>,<chip>-<device>.
7 name in their compatible property because they first appeared in this
11 -------------
14 #address-cells = <1>;
15 #size-cells = <0>;
20 reg = <0x00>;
26 reg = <0x02>;
34 - device_type
37 - reg
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio-rmu.txt | 5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
6 "fsl-srio-dbell-unit" and "fsl-srio-port-write-unit").
10 - compatible
13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
18 - reg
20 Value type: <prop-encoded-array>
21 Definition: A standard property. Specifies the physical address and
25 - fsl,liodn
26 Usage: optional-but-recommended (for devices with PAMU)
27 Value type: <prop-encoded-array>
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| D | pamu.txt | 5 The PAMU is an I/O MMU that provides device-to-memory access control and
10 - compatible : <string>
11 First entry is a version-specific string, such as
12 "fsl,pamu-v1.0". The second is "fsl,pamu".
13 - ranges : <prop-encoded-array>
14 A standard property. Utilized to describe the memory mapped
20 - interrupts : <prop-encoded-array>
25 - #address-cells: <u32>
26 A standard property.
27 - #size-cells : <u32>
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| D | raideng.txt | 3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
25 reg = <0x320000 0x10000>;
30 There must be a sub-node for each job queue present in RAID Engine
31 This node must be a sub-node of the main RAID Engine node
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| D | dcsr.txt | 21 - compatible
24 Definition: Must include "fsl,dcsr" and "simple-bus".
25 The DCSR space exists in the memory-mapped bus.
27 - #address-cells
30 Definition: A standard property. Defines the number of cells
33 - #size-cells
36 Definition: A standard property. Defines the number of cells
40 - ranges
42 Value type: <prop-encoded-array>
43 Definition: A standard property. Specifies the physical address
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| D | srio.txt | 5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
18 Definition: A standard property. Specifies the physical address and
22 - interrupts
24 Value type: <prop_encoded-array>
26 value of the interrupts property consists of one interrupt
31 property. (Typically shared with port-write).
33 - fsl,srio-rmu-handle:
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| /Documentation/devicetree/bindings/display/ |
| D | st,stih4xx.txt | 3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
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| D | dsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
20 responsible for defining whether each property is required or optional.
26 reg-property set to the virtual channel number, usually there is just
33 clock-master:
40 controlling this clock should contain this property.
42 "#address-cells":
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | interrupts.txt | 5 -------------------------
8 "interrupts" property, an "interrupts-extended" property, or both. If both are
16 interrupt-parent = <&intc1>;
19 The "interrupt-parent" property is used to specify the controller to which
21 controller node. This property is inherited, so it may be specified in an
23 "interrupts" property are always in reference to the node's interrupt parent.
25 The "interrupts-extended" property is a special form; useful when a node needs
27 the inherited one. Each entry in this property contains both the parent phandle
31 interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
34 -----------------------------
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | synopsys,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 bindings for the platform-specific integrations of the DWC HDMI TX.
20 responsible for defining whether each property is required or optional.
23 reg:
26 reg-io-width:
28 Width (in bytes) of the registers specified by the reg property.
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,ltc2947.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2947.pdf
20 - adi,ltc2947
22 reg:
29 charge and energy. When an external clock is used, this property must be
33 adi,accumulator-ctl-pol:
35 This property controls the polarity of current that is accumulated to
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| /Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
31 the reg property contained in bits 7 down to 0
42 reg:
49 this property is required and must be set to 0.
51 On ARM 11 MPcore based systems this property is
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| /Documentation/firmware-guide/acpi/dsd/ |
| D | data-node-references.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 node object. Do not use non-string references as this will produce a copy of
22 hierarchical data extension node [dsd-guide].
25 "@" character and the number of the node in hexadecimal notation (without pre-
26 or postfixes). The same ACPI object shall include the _DSD property extension
27 with a property "reg" that shall have the same numerical value as the number of
31 "reg" property shall be omitted from the ACPI object's _DSD properties and the
39 In the ASL snippet below, the "reference" _DSD property contains a string
47 ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
54 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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| /Documentation/devicetree/bindings/pmem/ |
| D | pmem-region.txt | 1 Device-tree bindings for persistent memory regions
2 -----------------------------------------------------
16 -----------------------------
19 - compatible = "pmem-region"
21 - reg = <base, size>;
22 The reg property should specify an address range that is
27 If the reg property contains multiple address ranges
33 - Any relevant NUMA associativity properties for the target platform.
35 - volatile; This property indicates that this region is actually
36 backed by non-persistent memory. This lets the OS know that it
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec6.txt | 4 -SEC 6 Node
5 -Job Ring Node
6 -Full Example
20 - compatible
23 Definition: Must include "fsl,sec-v6.0".
25 - fsl,sec-era
28 Definition: A standard property. Define the 'ERA' of the SEC
31 - #address-cells
34 Definition: A standard property. Defines the number of cells
37 - #size-cells
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-miphy365x.txt | 8 - compatible : Should be "st,miphy365x-phy"
9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
11 an entry for each port sub-node, specifying the control
14 Required nodes : A sub-node is required for each channel the controller
16 'reg' and 'reg-names' properties are used inside these
21 - #phy-cells : Should be 1 (See second example)
23 - PHY_TYPE_SATA
24 - PHY_TYPE_PCI
25 - reg : Address and length of register sets for each device in
26 "reg-names"
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | gpio.txt | 1 Every GPIO controller node must have #gpio-cells property defined,
2 this information will be used to translate gpio-specifiers.
10 - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
11 "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
12 "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
13 - #gpio-cells : Should be two. The first cell is the pin number and the
15 - gpio-controller : Marks the port as GPIO controller.
17 - fsl,cpm1-gpio-irq-mask : For banks having interrupt capability (like port C
20 - interrupts : This property provides the list of interrupt for each GPIO having
21 one as described by the fsl,cpm1-gpio-irq-mask property. There should be as
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | qcom-wled.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/qcom-wled.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Kiran Gunda <quic_kgunda@quicinc.com>
21 - qcom,pm8941-wled
22 - qcom,pmi8950-wled
23 - qcom,pmi8994-wled
24 - qcom,pmi8998-wled
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| /Documentation/devicetree/bindings/misc/ |
| D | fsl,qoriq-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
30 The generic 'iommus' property is insufficient to describe the relationship
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| /Documentation/devicetree/bindings/mailbox/ |
| D | altera-mailbox.txt | 5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
12 - interrupts : interrupt number. The interrupt specifier format
17 compatible = "altr,mailbox-1.0";
18 reg = <0x100 0x8>;
19 interrupt-parent = < &gic_0 >;
21 #mbox-cells = <1>;
25 compatible = "altr,mailbox-1.0";
26 reg = <0x200 0x8>;
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| /Documentation/devicetree/bindings/net/can/ |
| D | fsl,flexcan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
11 - Marc Kleine-Budde <mkl@pengutronix.de>
14 - $ref: can-controller.yaml#
19 - enum:
20 - fsl,imx95-flexcan
21 - fsl,imx93-flexcan
22 - fsl,imx8qm-flexcan
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| /Documentation/devicetree/bindings/mmc/ |
| D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-davinci.txt | 7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8 - reg : Offset and length of the register set for the device
9 - clocks: I2C functional clock phandle.
10 For 66AK2G this property should be set per binding,
11 Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
13 SoC-specific Required Properties:
17 - power-domains: Should contain a phandle to a PM domain provider node
19 value. This property is as per the binding,
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
23 - interrupts : standard interrupt property.
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