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/Documentation/devicetree/bindings/media/
Drenesas,csi2.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car MIPI CSI-2 receiver
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car CSI-2 receiver device provides MIPI CSI-2 capabilities for the
15 Renesas R-Car and RZ/G2 family of devices. It is used in conjunction with the
16 R-Car VIN module, which provides the video capture capabilities.
21 - enum:
22 - renesas,r8a774a1-csi2 # RZ/G2M
[all …]
Drenesas,isp.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car ISP Channel Selector
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car ISP Channel Selector provides MIPI CSI-2 VC and DT filtering
15 capabilities for the Renesas R-Car family of devices. It is used in
16 conjunction with the R-Car VIN and CSI-2 modules, which provides the video
22 - enum:
23 - renesas,r8a779a0-isp # V3U
[all …]
Dcdns,csi2tx.txt1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
8 - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
9 for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
10 - reg: base address and size of the memory mapped region
11 - clocks: phandles to the clocks driving the controller
12 - clock-names: must contain:
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
19 - phys: phandle to the D-PHY. If it is set, phy-names need to be set
20 - phy-names: must contain "dphy"
[all …]
Dti,da850-vpif.txt2 ----------------------
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
20 with child 'endpoint' node. If there are two ports then port@0 must
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
25 Example using 2 8-bit input channels, one of which is connected to an
26 I2C-connected TVP5147 decoder:
[all …]
Dcdns,csi2rx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence MIPI-CSI2 RX controller
10 - Maxime Ripard <mripard@kernel.org>
13 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
19 - enum:
20 - starfive,jh7110-csi2rx
21 - ti,j721e-csi2rx
22 - const: cdns,csi2rx
[all …]
Dmicrochip,csi2dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
30 32-bit IDI interface or a parallel interface.
34 This port has an 'endpoint' that can be connected to a sink port of another
44 const: microchip,sama7g5-csi2dc
53 clock-names:
63 - const: pclk
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dtvp5150.txt4 (and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV
5 with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats.
9 - compatible: Value must be "ti,tvp5150".
10 - reg: I2C slave address.
14 - pdn-gpios: Phandle for the GPIO connected to the PDN pin, if any.
15 - reset-gpios: Phandle for the GPIO connected to the RESETB pin, if any.
19 Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes
23 --------------------------------------
26 Y-OUT src 2
29 port must be linked to an endpoint defined in [1]. The port/connector layout is
[all …]
Dmaxim,max9286.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
28 '#address-cells':
31 '#size-cells':
[all …]
Dti,ds90ub960.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO
17 - $ref: /schemas/i2c/i2c-atr.yaml#
22 - ti,ds90ub960-q1
23 - ti,ds90ub9702-q1
33 clock-names:
[all …]
Dtechwell,tw9900.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mehdi Djait <mehdi.djait@bootlin.com>
13 The tw9900 is a multi-standard video decoder, supporting NTSC, PAL standards
14 with auto-detection features.
23 vdd-supply:
26 reset-gpios:
30 powerdown-gpios:
43 endpoint@0:
[all …]
/Documentation/staging/
Drpmsg.rst2 Remote Processor Messaging (rpmsg) Framework
14 Modern SoCs typically employ heterogeneous remote processor devices in
17 flavor of real-time OS.
19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
20 Typically, the dual cortex-A9 is running Linux in a SMP configuration,
24 Typically AMP remote processors employ dedicated DSP codecs and multimedia
25 hardware accelerators, and therefore are often used to offload CPU-intensive
28 These remote processors could also be used to control latency-sensitive
32 Users of those remote processors can either be userland apps (e.g. multimedia
33 frameworks talking with remote OMX components) or kernel drivers (controlling
[all …]
/Documentation/devicetree/bindings/display/
Dallwinner,sun8i-r40-tcon-top.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
22 / [0] TCON-LCD0
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
26 TCON-TOP
27 / \ [2] TCON-TV0 [0] - TVE0/RGB
[all …]
/Documentation/devicetree/bindings/display/ti/
Dti,omap-dss.txt5 -------------------
25 -----------
36 -------
39 name for each display. If no aliases are defined, a semi-random number is used
43 -------
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
49 compatible = "ti,omap4-dss";
54 clock-names = "fck";
55 #address-cells = <1>;
56 #size-cells = <1>;
[all …]
Dti,opa362.txt4 - compatible: "ti,opa362"
5 - enable-gpios: enable/disable output gpio
8 - Video port 0 for opa362 input
9 - Video port 1 for opa362 output
15 enable-gpios = <&gpio1 23 0>; /* GPIO to enable video out amplifier */
18 #address-cells = <1>;
19 #size-cells = <0>;
23 opa_in: endpoint@0 {
24 remote-endpoint = <&venc_out>;
30 opa_out: endpoint@0 {
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinay Simha BN <simhavcs@gmail.com>
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
25 - toshiba,tc358765
26 - toshiba,tc358775
32 vdd-supply:
[all …]
Dtoshiba,tc358767.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Gusakov <andrey.gusakov@cogentembedded.com>
19 - items:
20 - enum:
21 - toshiba,tc358867
22 - toshiba,tc9595
23 - const: toshiba,tc358767
24 - const: toshiba,tc358767
[all …]
Dfsl,imx8qxp-pixel-combiner.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
23 - fsl,imx8qm-pixel-combiner
24 - fsl,imx8qxp-pixel-combiner
26 "#address-cells":
29 "#size-cells":
38 clock-names:
[all …]
Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
25 const: fsl,imx8qxp-pxl2dpi
27 fsl,sc-resource:
31 power-domains:
[all …]
Drenesas,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
17 - $ref: synopsys,dw-hdmi.yaml#
22 - enum:
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
[all …]
/Documentation/devicetree/bindings/usb/
Dgpio-sbu-mux.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/gpio-sbu-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based SBU mux
10 - Bjorn Andersson <andersson@kernel.org>
13 In USB Type-C applications the SBU lines needs to be connected, disconnected
21 - enum:
22 - nxp,cbdtu02043
23 - onnn,fsusb43l10x
[all …]
Dnxp,ptn36502.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PTN36502 Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo redriver
10 - Luca Weiss <luca.weiss@fairphone.com>
15 - nxp,ptn36502
20 vdd18-supply:
23 orientation-switch: true
24 retimer-switch: true
31 description: Super Speed (SS) Output endpoint to the Type-C connector
[all …]
/Documentation/devicetree/bindings/mfd/
Dfsl,imx8qxp-csr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
17 use-case is for some other nodes to acquire a reference to the syscon node
18 by phandle, and the other typical use-case is that the operating system
23 pattern: "^syscon@[0-9a-f]+$"
27 - enum:
28 - fsl,imx8qxp-mipi-lvds-csr
[all …]
/Documentation/devicetree/bindings/display/hisilicon/
Ddw-dsi.txt1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
7 - compatible: value should be "hisilicon,hi6220-dsi".
8 - reg: physical base address and length of dsi controller's registers.
9 - clocks: contains APB clock phandle + clock-specifier pair.
10 - clock-names: should be "pclk".
11 - ports: contains DSI controller input and output sub port.
22 compatible = "hisilicon,hi6220-dsi";
25 clock-names = "pclk";
29 #address-cells = <1>;
30 #size-cells = <0>;
[all …]
/Documentation/devicetree/bindings/display/msm/
Dqcom,sc8280xp-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
15 $ref: /schemas/display/msm/dpu-common.yaml#
19 const: qcom,sc8280xp-dpu
23 - description: Address offset and size for mdp register set
24 - description: Address offset and size for vbif register set
26 reg-names:
[all …]
/Documentation/devicetree/bindings/arm/
Darm,coresight-dynamic-funnel.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Coresight funnel merges 2-8 trace sources into a single trace
31 const: arm,coresight-dynamic-funnel
[all …]

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