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/Documentation/misc-devices/
Dics932s401.rst35 The clocks could be reprogrammed to increase system speed. I will not help you
/Documentation/devicetree/bindings/clock/
Dsilabs,si570.txt29 frequency set during boot. It can be reprogrammed during
/Documentation/devicetree/bindings/iio/temperature/
Dmelexis,mlx90632.yaml51 description: Default is 0x3a, but can be reprogrammed.
/Documentation/devicetree/bindings/fpga/
Dfpga-region.yaml42 * A section of an FPGA is reprogrammed while the rest of the FPGA is not
50 be independently reprogrammed many times.
87 later be reprogrammed.
109 reprogrammed independently while the rest of the system continues to function.
/Documentation/watchdog/
Dhpwdt.rst44 is > 0, the timer is reprogrammed with the greater of
/Documentation/timers/
Dhighres.rst168 whether the event device has to be reprogrammed when a timer is added. The
/Documentation/admin-guide/pm/
Dcpuidle.rst225 reprogrammed in that case. Second, if the governor is expecting a non-timer
232 waste of time and in this case the timer hardware would need to be reprogrammed,
/Documentation/RCU/
DlistRCU.rst400 ``CLOCK_REALTIME`` clock is reprogrammed (for example due to setting
/Documentation/networking/dsa/
Dsja1105.rst66 reprogrammed with the updated static configuration.
/Documentation/fpga/
Ddfl.rst661 The purpose of an FPGA is to be reprogrammed with newly developed hardware