Searched +full:required +full:- +full:opps (Results  1 – 25 of 47) sorted by relevance
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| /Documentation/devicetree/bindings/display/msm/ | 
| D | qcom,x1e80100-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,x1e80100-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Abel Vesa <abel.vesa@linaro.org> 13   X1E80100 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20     const: qcom,x1e80100-mdss 24       - description: Display AHB 25       - description: Display hf AXI [all …] 
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| D | qcom,sm8450-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8450-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16     const: qcom,sm8450-dpu 20       - description: Address offset and size for mdp register set 21       - description: Address offset and size for vbif register set 23   reg-names: [all …] 
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| D | qcom,sm7150-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm7150-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Danila Tikhonov <danila@jiaxyga.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16     const: qcom,sm7150-dpu 20       - description: Address offset and size for mdp register set 21       - description: Address offset and size for vbif register set 23   reg-names: [all …] 
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| D | qcom,sm7150-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm7150-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Danila Tikhonov <danila@jiaxyga.com> 13   SM7150 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20     const: qcom,sm7150-mdss 24       - description: Display ahb clock from gcc 25       - description: Display hf axi clock [all …] 
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| D | qcom,sc7280-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Krishna Manikandan <quic_mkrishn@quicinc.com> 14   sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21     const: qcom,sc7280-mdss 25       - description: Display AHB clock from gcc 26       - description: Display AHB clock from dispcc [all …] 
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| D | qcom,sm8550-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8550-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Neil Armstrong <neil.armstrong@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16     const: qcom,sm8550-dpu 20       - description: Address offset and size for mdp register set 21       - description: Address offset and size for vbif register set 23   reg-names: [all …] 
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| D | qcom,sm8650-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Neil Armstrong <neil.armstrong@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17       - qcom,sm8650-dpu 18       - qcom,x1e80100-dpu 22       - description: Address offset and size for mdp register set 23       - description: Address offset and size for vbif register set [all …] 
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| D | qcom,sm8350-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Robert Foss <robert.foss@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16     const: qcom,sm8350-dpu 20       - description: Address offset and size for mdp register set 21       - description: Address offset and size for vbif register set 23   reg-names: [all …] 
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| D | qcom,sm8450-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 13   SM8450 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20     const: qcom,sm8450-mdss 24       - description: Display AHB 25       - description: Display hf AXI [all …] 
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| D | qcom,sm8650-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Neil Armstrong <neil.armstrong@linaro.org> 13   SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20     const: qcom,sm8650-mdss 24       - description: Display AHB 25       - description: Display hf AXI [all …] 
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| D | qcom,sm8250-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 14   sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21     const: qcom,sm8250-mdss 25       - description: Display AHB clock from gcc 26       - description: Display hf axi clock [all …] 
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| D | qcom,sm8550-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8550-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Neil Armstrong <neil.armstrong@linaro.org> 13   SM8550 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20     const: qcom,sm8550-mdss 24       - description: Display MDSS AHB 25       - description: Display AHB [all …] 
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| D | qcom,sc7180-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Krishna Manikandan <quic_mkrishn@quicinc.com> 14   sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21     const: qcom,sc7180-mdss 25       - description: Display AHB clock from gcc 26       - description: Display AHB clock from dispcc [all …] 
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| D | qcom,sm8150-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 14   sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 22       - const: qcom,sm8150-mdss 26       - description: Display AHB clock from gcc 27       - description: Display hf axi clock [all …] 
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| /Documentation/devicetree/bindings/clock/ | 
| D | qcom,sm8350-videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8350-videocc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Konrad Dybcio <konradybcio@kernel.org> 17     include/dt-bindings/clock/qcom,videocc-sm8350.h 18     include/dt-bindings/reset/qcom,videocc-sm8350.h 23       - qcom,sc8280xp-videocc 24       - qcom,sm8350-videocc 28       - description: Board XO source [all …] 
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| D | qcom,sm8450-videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Taniya Das <quic_tdas@quicinc.com> 11   - Jagadeesh Kona <quic_jkona@quicinc.com> 18     include/dt-bindings/clock/qcom,sm8450-videocc.h 19     include/dt-bindings/clock/qcom,sm8650-videocc.h 24       - qcom,sm8450-videocc 25       - qcom,sm8550-videocc [all …] 
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| D | qcom,sm8150-camcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8150-camcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Satya Priya Kakitapalli <quic_skakitap@quicinc.com> 16   See also:: include/dt-bindings/clock/qcom,sm8150-camcc.h 20     const: qcom,sm8150-camcc 27       - description: Board XO source 28       - description: Camera AHB clock from GCC 30   power-domains: [all …] 
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| D | qcom,sm6375-gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Konrad Dybcio <konradybcio@kernel.org> 16   See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h 21       - qcom,sm6375-gpucc 25       - description: Board XO source 26       - description: GPLL0 main branch source 27       - description: GPLL0 div branch source [all …] 
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| D | qcom,sm8450-camcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> 11   - Jagadeesh Kona <quic_jkona@quicinc.com> 18     include/dt-bindings/clock/qcom,sc8280xp-camcc.h 19     include/dt-bindings/clock/qcom,sm8450-camcc.h 20     include/dt-bindings/clock/qcom,sm8550-camcc.h 21     include/dt-bindings/clock/qcom,sm8650-camcc.h [all …] 
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| /Documentation/devicetree/bindings/opp/ | 
| D | opp-v2-kryo-cpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Ilia Lin <ilia.lin@kernel.org> 13   - $ref: opp-v2-base.yaml# 22   The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide 23   the OPP framework with required information (existing HW bitmap). 25   operating-points-v2 table when it is parsed by the OPP framework. 30       - operating-points-v2-krait-cpu [all …] 
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| D | opp-v2-base.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Viresh Kumar <viresh.kumar@linaro.org> 13   Devices work at voltage-current-frequency combinations and some implementations 15   Performance Points aka OPPs. This document defines bindings for these OPPs 19   This describes the OPPs belonging to a device. 25     pattern: '^opp-table(-[a-z0-9]+)?$' 27   opp-shared: [all …] 
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| /Documentation/power/ | 
| D | opp.rst | 5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated 20 ------------------------------------------------- 22 Complex SoCs of today consists of a multiple sub-modules working in conjunction. 25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some 31 OPPs. 39 We can represent these as three OPPs as the following {Hz, uV} tuples: 41 - {300000000, 1000000} 42 - {800000000, 1200000} 43 - {1000000000, 1300000} 46 ---------------------------------------- [all …] 
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| /Documentation/devicetree/bindings/cpufreq/ | 
| D | qcom-cpufreq-nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Ilia Lin <ilia.lin@kernel.org> 18   according to the required OPPs defined in the CPU OPP tables. 28           - qcom,apq8064 29           - qcom,apq8096 30           - qcom,ipq5332 31           - qcom,ipq6018 [all …] 
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| /Documentation/devicetree/bindings/mmc/ | 
| D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10   - Bhupesh Sharma <bhupesh.sharma@linaro.org> 19       - enum: 20           - qcom,sdhci-msm-v4 22       - items: 23           - enum: [all …] 
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| /Documentation/devicetree/bindings/power/ | 
| D | qcom,rpmpd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Bjorn Andersson <andersson@kernel.org> 19       - enum: 20           - qcom,mdm9607-rpmpd 21           - qcom,msm8226-rpmpd 22           - qcom,msm8909-rpmpd 23           - qcom,msm8916-rpmpd 24           - qcom,msm8917-rpmpd [all …] 
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