Home
last modified time | relevance | path

Searched +full:reserved +full:- +full:memory (Results 1 – 25 of 264) sorted by relevance

1234567891011

/Documentation/devicetree/bindings/soc/fsl/
Dfsl,qman-fqd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,qman-fqd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: QMan Private Memory Nodes
10 - Frank Li <Frank.Li@nxp.com>
13 QMan requires two contiguous range of physical memory used for the backing store
15 This memory is reserved/allocated as a node under the /reserved-memory node.
17 BMan requires a contiguous range of physical memory used for the backing store
18 for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as
[all …]
/Documentation/devicetree/bindings/reserved-memory/
Dnvidia,tegra264-bpmp-shmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra CPU-NS - BPMP IPC reserved memory
10 - Peter De Schrijver <pdeschrijver@nvidia.com>
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
16 The memory region is defined using a child node under /reserved-memory.
17 The sub-node is named shmem@<address>.
[all …]
Dxen,shared-memory.txt1 * Xen hypervisor reserved-memory binding
3 Expose one or more memory regions as reserved-memory to the guest
5 to be a shared memory area across multiple virtual machines for
8 For each of these pre-shared memory regions, a range is exposed under
9 the /reserved-memory node as a child node. Each range sub-node is named
10 xen-shmem@<address> and has the following properties:
12 - compatible:
13 compatible = "xen,shared-memory-v1"
15 - reg:
16 the base guest physical address and size of the shared memory region
[all …]
Dnvidia,tegra210-emc-table.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra210-emc-table.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 EMC frequency table via a reserved memory region.
17 - $ref: reserved-memory.yaml
21 const: nvidia,tegra210-emc-table
24 description: region of memory reserved by firmware to pass the EMC
[all …]
Dgoogle,open-dice.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/google,open-dice.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding represents a reserved memory region containing data
13 See https://pigweed.googlesource.com/open-dice/
16 - David Brazdil <dbrazdil@google.com>
19 - $ref: reserved-memory.yaml
23 const: google,open-dice
26 description: page-aligned region of memory containing DICE data
[all …]
Dqcom,cmd-db.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/qcom,cmd-db.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 is stored in a shared memory region and is loaded by the remote processor.
17 remote processor and made available in the shared memory.
20 - Bjorn Andersson <bjorn.andersson@linaro.org>
23 - $ref: reserved-memory.yaml
27 const: qcom,cmd-db
30 - reg
[all …]
Dphram.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/phram.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Specifies that the reserved memory region can be used as an MTD or block
17 - Vincent Whitchurch <vincent.whitchurch@axis.com>
20 - $ref: reserved-memory.yaml
21 - $ref: /schemas/mtd/mtd.yaml
28 description: region of memory that can be used as an MTD/block device
31 - compatible
[all …]
Dramoops.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/ramoops.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 recovered after a reboot. This is a child-node of "/reserved-memory", and
16 as kernel log messages, or for optional ECC error-correction data. The total
17 size of these optional buffers must fit in the reserved region.
23 At least one of "record-size", "console-size", "ftrace-size", or "pmsg-size"
24 must be set non-zero, but are otherwise optional as listed below.
27 - Kees Cook <keescook@chromium.org>
[all …]
Dqcom,rmtfs-mem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/qcom,rmtfs-mem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Remote File System Memory
10 This binding describes the Qualcomm remote filesystem memory, which serves the
11 purpose of describing the shared memory region used for remote processors to
15 - Bjorn Andersson <bjorn.andersson@linaro.org>
18 - $ref: reserved-memory.yaml
22 const: qcom,rmtfs-mem
[all …]
/Documentation/devicetree/bindings/remoteproc/
Dti,davinci-rproc.txt4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
9 like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
15 Each DSP Core sub-system is represented as a single DT node.
18 --------------------
21 - compatible: Should be one of the following,
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
24 - reg: Should contain an entry for each value in 'reg-names'.
25 Each entry should have the memory region's start address
[all …]
Drenesas,rcar-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/renesas,rcar-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car remote processor controller
10 - Julien Massot <julien.massot@iot.bzh>
14 boots firmwares on the Renesas R-Car family chipset.
15 R-Car gen3 family may have a realtime processor, this processor shares peripheral
20 const: renesas,rcar-cr7
25 power-domains:
[all …]
Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
[all …]
Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
[all …]
Dti,k3-m4f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hari Nagalla <hnagalla@ti.com>
11 - Mathieu Poirier <mathieu.poirier@linaro.org>
20 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
25 - ti,am64-m4fss
27 power-domains:
30 "#address-cells":
[all …]
Dst-rproc.txt1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
16 - reset-names Must be "sw_reset" and "pwr_reset"
[all …]
Dti,keystone-rproc.txt5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
9 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller,
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
[all …]
/Documentation/devicetree/bindings/watchdog/
Dti,rti-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <t-kristo@ti.com>
21 - $ref: watchdog.yaml#
26 - ti,j7-rti-wdt
34 power-domains:
37 memory-region:
40 Contains the watchdog reserved memory. It is optional.
[all …]
/Documentation/arch/arm64/
Dkdump.rst2 crashkernel memory reservation on arm64
9 reserved memory is needed to pre-load the kdump kernel and boot such
12 That reserved memory for kdump is adapted to be able to minimally
19 Through the kernel parameters below, memory can be reserved accordingly
21 large chunk of memomy can be found. The low memory reservation needs to
22 be considered if the crashkernel is reserved from the high memory area.
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
[all …]
/Documentation/arch/powerpc/
Dfirmware-assisted-dump.rst2 Firmware-Assisted Dump
7 The goal of firmware-assisted dump is to enable the dump of
8 a crashed system, and to do so from a fully-reset system, and
12 - Firmware-Assisted Dump (FADump) infrastructure is intended to replace
14 - Fadump uses the same firmware interfaces and memory reservation model
16 - Unlike phyp dump, FADump exports the memory dump through /proc/vmcore
19 - Unlike phyp dump, userspace tool does not need to refer any sysfs
21 - Unlike phyp dump, FADump allows user to release all the memory reserved
23 - Once enabled through kernel boot parameter, FADump can be
28 Comparing with kdump or other strategies, firmware-assisted
[all …]
/Documentation/devicetree/bindings/firmware/
Dgunyah-cma-mem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/gunyah-cma-mem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Contiguous memory allocator for Virtual Machines
10 - Prakruthi Deepak Heragu <quic_pheragu@quicinc.com>
11 - Elliot Berman <quic_eberman@quicinc.com>
14 gunyah-cma-mem is a CMA memory manager that allows VMMs to use
15 contiguous memory to backup Virtual Machines running on Gunyah. These
16 regions are pre-defined by the firmware to have special attributes
[all …]
Dintel,stratix10-svc.txt3 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
22 -------------------
26 - compatible: "intel,stratix10-svc" or "intel,agilex-svc"
27 - method: smc or hvc
28 smc - Secure Monitor Call
29 hvc - Hypervisor Call
30 - memory-region:
31 phandle to the reserved memory node. See
32 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
36 -------
[all …]
/Documentation/arch/xtensa/
Datomctl.rst10 can do Atomic Transactions to the memory internally.
12 2. With and without An Intelligent Memory Controller which
19 On the FPGA Cards we typically simulate an Intelligent Memory controller
21 Memory controller we let it to the atomic operations internally while
22 doing a Cached (WB) transaction and use the Memory RCW for un-cached
25 For systems without an coherent cache controller, non-MX, we always
26 use the memory controllers RCW, though non-MX controllers likely
29 CUSTOMER-WARNING:
30 Virtually all customers buy their memory controllers from vendors that
31 don't support atomic RCW memory transactions and will likely want to
[all …]
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,smem.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Shared Memory Manager
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 This binding describes the Qualcomm Shared Memory Manager, a region of
15 reserved-memory used to share data between various subsystems and OSes in
25 memory-region:
27 description: handle to memory reservation for main SMEM memory region.
[all …]
/Documentation/devicetree/bindings/sound/
Dgoogle,cros-ec-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cheng-Yi Chiang <cychiang@chromium.org>
11 - Tzung-Bi Shih <tzungbi@kernel.org>
15 Embedded Controller (EC) and is controlled via a host-command
17 subnode of a cros-ec node.
18 (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml).
21 - $ref: dai-common.yaml#
[all …]
/Documentation/devicetree/bindings/tpm/
Dtpm-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/tpm/tpm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lukas Wunner <lukas@wunner.de>
14 pattern: '^tpm(@[0-9a-f]+)?$'
23 linux,sml-base:
25 base address of reserved memory allocated for firmware event log
28 linux,sml-size:
30 size of reserved memory allocated for firmware event log
[all …]

1234567891011