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/Documentation/hwmon/
Dlm92.rst44 control the thresholds for resetting alarms.
Djc42.rst126 There is also an hysteresis to control the thresholds for resetting alarms.
/Documentation/ABI/testing/
Dsysfs-bus-fsi45 Provides a means of resetting the cfam that is attached to the
Dsysfs-block-zram21 The reset file is write-only and allows resetting the
47 compressed data. For resetting the value, you should write
Dsysfs-class-mei79 RESETTING
Dsysfs-bus-pci-devices-cciss71 a dump device, as kdump requires resetting the device in order
Dsysfs-bus-cdx79 on the bus. On resetting the device, the corresponding driver is
/Documentation/i2c/
Dfault-codes.rst14 some cases, such as re-initializing (and maybe resetting). After such
67 SMBus adapter) needs some fault recovery (such as resetting),
/Documentation/driver-api/media/
Ddtv-common.rst45 Resetting the buffer counts as a read and write operation.
/Documentation/driver-api/
Dlibata.rst568 gathering and could trigger complex error handling (say, resetting &
817 indicates something is very wrong with the system. Resetting host
826 Resetting host controller is recommended.
834 it forget about the timed out command, resetting is necessary. The timed
862 During EH, resetting is necessary in the following cases.
872 Resetting during EH might be a good idea regardless of error condition
881 HBA resetting is implementation specific. For a controller complying to
906 some level of resetting, possibly similar level with software reset.
922 This is the preferred way of resetting a SATA device. In effect,
927 One more thing to consider when resetting devices is that resetting
/Documentation/devicetree/bindings/net/nfc/
Dst,st-nci.yaml20 description: Output GPIO pin used for resetting the controller
/Documentation/devicetree/bindings/clock/
Dnvidia,tegra20-car.yaml25 RSTGEN provides the registers needed to control resetting of each block in
Dnvidia,tegra124-car.yaml25 RSTGEN provides the registers needed to control resetting of each block in
Dbaikal,bt1-ccu-pll.yaml15 responsible for the chip subsystems clocking and resetting. The CCU is
/Documentation/devicetree/bindings/hwmon/
Dpwm-fan.yaml31 it must be self resetting edge interrupts.
/Documentation/devicetree/bindings/arm/
Dsyna.txt34 CPU control register allows various operations on CPUs, like resetting them
/Documentation/userspace-api/media/v4l/
Dselection-api-examples.rst11 Example: Resetting the cropping parameters
/Documentation/devicetree/bindings/net/
Dsmsc,lan9115.yaml70 Indicates that MAC address needs to be saved before resetting the
/Documentation/devicetree/bindings/usb/
Dcdns,usb3.yaml73 description: Enable resetting of PHY if Rx fail is detected
/Documentation/driver-api/soundwire/
Derror_handling.rst27 not be responsible for the errors so resetting them individually is not a
/Documentation/scsi/
Dqlogicfas.rst31 thing to do is load the kernel without resetting the hardware, which
DChangeLog.ips24 - 5 second delay needed after resetting an i960 adapter
/Documentation/core-api/
Dunion_find.rst17 Initialization: Resetting each element as an individual set, with
/Documentation/devicetree/bindings/iio/pressure/
Dhoneywell,mprls0025pa.yaml56 Optional GPIO for resetting the device.
/Documentation/admin-guide/media/
Dfimc.rst104 the sub-devices (format, crop), to avoid resetting the subdevs' configuration

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